Instruction Set Summary |
When Motorola came out with the MEK6800 D1 and MEK6800 D2 Microcomputers, they included a 5" x 15" fold up card that contained the M6800 MICROPROCESSOR Instruction Set Summary. The card was split into 5 sections and folded into a nice 3" x 5" set of notes. The card was printed on both sides and covered everything you needed to know about the MC6800 instructions.
While the fold up card was great, it was printed in a very small font and suffered from excessive use. Many of the cards turned into tattered rags. I have serveral of these card. They have been treated well and are completely intact. But the font seems to get smaller every year. So the tables below are an effort to replicate the cards, in a easier to read font size. And, believe me, these were very difficult tables to create.
I did take some liberties in creating the tables. For example, some of the Condition Code Register Notes, used a circled number as a reference. However, the symbols available in HTML only go from 1 to 10, but I needed 1 through 12. So I eliminated the circle and just used bolded numbers.
Accumulator and Memory Instructions |
ADDRESSING MODES | BOOLEAN/ARITHMETIC OPERATION | COND. CODE REG. | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ACCUMULATOR AND MEMORY | IMMED | DIRECT | INDEX | EXTND | INHER | (All register lables | 5 | 4 | 3 | 2 | 1 | 0 | |||||||||||
OPERATIONS | MNEMONIC | OP | ~ | # | OP | ~ | # | OP | ~ | # | OP | ~ | # | OP | ~ | # | refer to contents) | H | I | N | Z | V | C |
Add | ADDA | 8B | 2 | 2 | 9B | 3 | 2 | AB | 5 | 2 | BB | 4 | 3 | A + M ➜ A | ↕ | ● | ↕ | ↕ | ↕ | ↕ | |||
ADDB | CB | 2 | 2 | DB | 3 | 2 | EB | 5 | 2 | FB | 4 | 3 | B + M ➜ B | ↕ | ● | ↕ | ↕ | ↕ | ↕ | ||||
Add Acmltrs | ABA | 18 | 2 | 1 | A + B ➜ A | ↕ | ● | ↕ | ↕ | ↕ | ↕ | ||||||||||||
Add with Carry | ADCA | 89 | 2 | 2 | 99 | 3 | 2 | A9 | 5 | 2 | B9 | 4 | 3 | A + B + C ➜ A | ↕ | ● | ↕ | ↕ | ↕ | ↕ | |||
ADCB | C9 | 2 | 2 | D9 | 3 | 2 | E9 | 5 | 2 | F9 | 4 | 3 | A + B + C ➜ B | ↕ | ● | ↕ | ↕ | ↕ | ↕ | ||||
And | ANDA | 84 | 2 | 2 | 94 | 3 | 2 | A4 | 5 | 2 | B4 | 4 | 3 | A ● M ➜ A | ● | ● | ↕ | ↕ | R | ● | |||
ANDB | C4 | 2 | 2 | D4 | 3 | 2 | E4 | 5 | 2 | F4 | 4 | 3 | B ● M ➜ B | ● | ● | ↕ | ↕ | R | ● | ||||
Bit Test | BITA | 85 | 2 | 2 | 95 | 3 | 2 | A5 | 5 | 2 | B5 | 4 | 3 | A ● M | ● | ● | ↕ | ↕ | R | ● | |||
BITB | C5 | 2 | 2 | D5 | 3 | 2 | E5 | 5 | 2 | F5 | 4 | 3 | B ● M | ● | ● | ↕ | ↕ | R | ● | ||||
Clear | CLR | 6F | 7 | 2 | 7F | 6 | 3 | 00 ➜ M | ● | ● | R | S | R | R | |||||||||
CLRA | 4F | 2 | 1 | 00 ➜ A | ● | ● | R | S | R | R | |||||||||||||
CLRB | 5F | 2 | 1 | 00 ➜ B | ● | ● | R | S | R | R | |||||||||||||
Compare | CMPA | 81 | 2 | 2 | 91 | 3 | 2 | A1 | 5 | 2 | B1 | 4 | 3 | A - M | ● | ● | ↕ | ↕ | ↕ | ↕ | |||
CMPB | C1 | 2 | 2 | D1 | 3 | 2 | E1 | 5 | 2 | F1 | 4 | 3 | B - M | ● | ● | ↕ | ↕ | ↕ | ↕ | ||||
Compare Acmltrs | CBA | 11 | 2 | 3 | A - B | ● | ● | ↕ | ↕ | ↕ | ↕ | ||||||||||||
Complement, 1's | COM | 63 | 7 | 2 | 73 | 6 | 3 | M ➜ M | ↕ | ● | ↕ | ↕ | R | S | |||||||||
COMA | 43 | 2 | 1 | A ➜ A | ↕ | ● | ↕ | ↕ | R | S | |||||||||||||
COMB | 53 | 2 | 1 | B ➜ B | ↕ | ● | ↕ | ↕ | R | S | |||||||||||||
Complement, 2's | NEG | 60 | 7 | 2 | 70 | 6 | 3 | 00 - M ➜ M | ● | ● | ↕ | ↕ | 1 | 2 | |||||||||
(Negate) | NEGA | 40 | 2 | 1 | 00 - A ➜ A | ● | ● | ↕ | ↕ | 1 | 2 | ||||||||||||
NEGB | 50 | 2 | 1 | 00 - B ➜ B | ● | ● | ↕ | ↕ | 1 | 2 | |||||||||||||
Decimal Adjust, A | DAA | 19 | 2 | 1 | Converts Binary Add. of BCD | ● | ● | ↕ | ↕ | ↕ | 3 | ||||||||||||
Characters into BCD Format | |||||||||||||||||||||||
Decrement | DEC | 6A | 7 | 2 | 7A | 6 | 3 | M - 1 ➜ M | ● | ● | ↕ | ↕ | 4 | ● | |||||||||
DECA | 4A | 2 | 1 | A - 1 ➜ A | ● | ● | ↕ | ↕ | 4 | ● | |||||||||||||
DECB | 5A | 2 | 1 | B - 1 ➜ B | ● | ● | ↕ | ↕ | 4 | ● | |||||||||||||
Exclusive OR | EORA | 88 | 2 | 2 | 98 | 3 | 2 | A8 | 5 | 2 | B8 | 4 | 3 | A ⊕ M ➜ A | ● | ● | ↕ | ↕ | R | ↕ | |||
EORB | C8 | 2 | 2 | D8 | 3 | 2 | E8 | 5 | 2 | F8 | 4 | 3 | B ⊕ M ➜ B | ● | ● | ↕ | ↕ | R | ↕ | ||||
Increment | INC | 6C | 7 | 2 | 7C | 6 | 3 | M + 1 ➜ M | ● | ● | ↕ | ↕ | 5 | ● | |||||||||
INCA | 4C | 2 | 1 | A + 1 ➜ A | ● | ● | ↕ | ↕ | 5 | ● | |||||||||||||
INCB | 5C | 2 | 1 | B + 1 ➜ B | ● | ● | ↕ | ↕ | 5 | ● | |||||||||||||
Load Acmltrs | LDAA | 86 | 2 | 2 | 96 | 3 | 2 | A6 | 5 | 2 | B6 | 4 | 3 | M ➜ A | ● | ● | ↕ | ↕ | R | ● | |||
LDAB | C6 | 2 | 2 | D6 | 3 | 2 | E6 | 5 | 2 | F6 | 4 | 3 | M ➜ B | ● | ● | ↕ | ↕ | R | ● | ||||
OR, Inclusive | ORAA | 8A | 2 | 2 | 9A | 3 | 2 | AA | 5 | 2 | BA | 4 | 3 | A ✚ M ➜ A | ● | ● | ↕ | ↕ | R | ● | |||
ORAB | CA | 2 | 2 | DA | 3 | 2 | EA | 5 | 2 | FA | 4 | 3 | B ✚ M ➜ B | ● | ● | ↕ | ↕ | R | ● | ||||
Push Data | PSHA | 36 | 4 | 1 | A ➜ MSP, SP - 1 ➜ SP | ● | ● | ● | ● | ● | ● | ||||||||||||
PSHB | 37 | 4 | 1 | B ➜ MSP, SP - 1 ➜ SP | ● | ● | ● | ● | ● | ● | |||||||||||||
Pull Data | PULA | 32 | 4 | 1 | SP + 1 ➜ SP, MSP ➜ A | ● | ● | ● | ● | ● | ● | ||||||||||||
PULB | 33 | 4 | 1 | SP + 1 ➜ SP, MSP ➜ B | ● | ● | ● | ● | ● | ● | |||||||||||||
Rotate Left | ROL | 69 | 7 | 2 | 79 | 6 | 3 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||
ROLA | 49 | 2 | 1 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||||||
ROLB | 59 | 2 | 1 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||||||
Rotate Right | ROR | 66 | 7 | 2 | 76 | 6 | 3 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||
RORA | 46 | 2 | 1 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||||||
RORB | 56 | 2 | 1 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||||||
Shift Left, | ASL | 68 | 7 | 2 | 78 | 6 | 3 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||
Arithmetic | ASLA | 48 | 2 | 1 | ● | ● | ↕ | ↕ | 6 | ● | |||||||||||||
ASLB | 58 | 2 | 1 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||||||
Shift Right, | ASR | 67 | 7 | 2 | 77 | 6 | 3 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||
Arithmetic | ASRA | 47 | 2 | 1 | ● | ● | ↕ | ↕ | 6 | ● | |||||||||||||
ASRB | 57 | 2 | 1 | ● | ● | ↕ | ↕ | 6 | ● | ||||||||||||||
Shift Right, | LSR | 64 | 7 | 2 | 74 | 6 | 3 | ● | ● | R | ↕ | 6 | ● | ||||||||||
Logic | LSRA | 44 | 2 | 1 | ● | ● | R | ↕ | 6 | ● | |||||||||||||
LSRB | 54 | 2 | 1 | ● | ● | R | ↕ | 6 | ● | ||||||||||||||
Store Acmltrs | STAA | 97 | 4 | 2 | A7 | 6 | 2 | B7 | 5 | 3 | A ➜ M | ● | ● | ↕ | ↕ | R | ● | ||||||
STAB | D7 | 4 | 2 | E7 | 6 | 2 | F7 | 5 | 3 | B ➜ M | ● | ● | ↕ | ↕ | R | ● | |||||||
Subtract | SUBA | 80 | 2 | 2 | 90 | 3 | 2 | A0 | 5 | 2 | B0 | 4 | 3 | A - M ➜ A | ● | ● | ↕ | ↕ | ↕ | ↕ | |||
SUBB | C0 | 2 | 2 | D0 | 3 | 2 | E0 | 5 | 2 | F0 | 4 | 3 | B - M ➜ B | ● | ● | ↕ | ↕ | ↕ | ↕ | ||||
Subtract Acmltrs | SBA | 10 | 2 | 1 | A - B ➜ A | ● | ● | ↕ | ↕ | ↕ | ↕ | ||||||||||||
Subtr. with Carry | SBCA | 82 | 2 | 2 | 92 | 3 | 2 | A2 | 5 | 2 | B2 | 4 | 3 | A - M - C ➜ A | ● | ● | ↕ | ↕ | ↕ | ↕ | |||
SBCB | C2 | 2 | 2 | D2 | 3 | 2 | E2 | 4 | 2 | F2 | 4 | 3 | B - M - C ➜ B | ● | ● | ↕ | ↕ | ↕ | ↕ | ||||
Transfer Acmltrs | TAB | 16 | 2 | 1 | A ➜ B | ● | ● | ↕ | ↕ | R | ● | ||||||||||||
TBA | 17 | 2 | 1 | B ➜ A | ● | ● | ↕ | ↕ | R | ● | |||||||||||||
Test, Zero or Minus | TST | 6D | 7 | 2 | 7D | 6 | 3 | M - 00 | ● | ● | ↕ | ↕ | R | R | |||||||||
TSTA | 4D | 2 | 1 | A - 00 | ● | ● | ↕ | ↕ | R | R | |||||||||||||
TSTB | 5D | 2 | 1 | B - 00 | ● | ● | ↕ | ↕ | R | R |
Index Register and Stack Instructions |
ADDRESSING MODES | BOOLEAN/ARITHMETIC OPERATION | COND. CODE REG. | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INDEX REGISTER AND STACK | IMMED | DIRECT | INDEX | EXTND | INHER | (All register lables | 5 | 4 | 3 | 2 | 1 | 0 | |||||||||||
POINTER OPERATIONS | MNEMONIC | OP | ~ | # | OP | ~ | # | OP | ~ | # | OP | ~ | # | OP | ~ | # | refer to contents) | H | I | N | Z | V | C |
Compare Index Reg | CPX | 8C | 3 | 3 | 9C | 4 | 2 | AC | 6 | 2 | BC | 5 | 3 | (XH/XL) - (M/M + 1) | ● | ● | 7 | ↕ | 8 | ● | |||
Decrement Index Reg | DEX | 09 | 4 | 1 | X - 1 ➜ X | ● | ● | ● | ↕ | ● | ● | ||||||||||||
Decrement Stack Pntr | DES | 34 | 4 | 1 | SP - 1 ➜ SP | ● | ● | ● | ● | ● | ● | ||||||||||||
Increment Index Reg | INX | 08 | 4 | 1 | X + 1 ➜ X | ● | ● | ● | ↕ | ● | ● | ||||||||||||
Increment Stack Pntr | INS | 31 | 4 | 1 | SP + 1 ➜ SP | ● | ● | ● | ● | ● | ● | ||||||||||||
Load Index Reg | LDX | CE | 3 | 3 | DE | 4 | 2 | EE | 6 | 2 | FE | 5 | 3 | M ➜ XH, (M + 1) ➜ XL | ● | ● | 9 | ↕ | R | ● | |||
Load Stack Pntr | LDS | 8E | 3 | 3 | 9E | 4 | 2 | AE | 6 | 2 | BE | 5 | 3 | M ➜ SPH, (M + 1) ➜ SPL | ● | ● | 9 | ↕ | R | ● | |||
Store Index Reg | STX | DF | 4 | 2 | EF | 6 | 2 | FF | 5 | 3 | XH ➜ M, XL ➜ (M + 1) | ● | ● | 9 | ↕ | R | ● | ||||||
Store Stack Pntr | STS | 9F | 4 | 2 | AF | 6 | 2 | BF | 5 | 3 | SPH ➜ M, SPL ➜ (M + 1) | ● | ● | 9 | ↕ | R | ● | ||||||
Index Reg➜Stack Pntr | TXS | 35 | 4 | 1 | X - 1 ➜ SP | ● | ● | ● | ● | ● | ● | ||||||||||||
Stack Pntr➜Index Reg | TSX | 30 | 4 | 1 | SP + 1 ➜ X | ● | ● | ● | ● | ● | ● |
Jump and Branch Instructions |
ADDRESSING MODES | COND. CODE REG. | |||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
JUMP AND BRANCH | RELATIVE | INDEX | EXTND | INHER | 5 | 4 | 3 | 2 | 1 | 0 | ||||||||||
OPERATIONS | MNEMONIC | OP | ~ | # | OP | ~ | # | OP | ~ | # | OP | ~ | # | BRANCH TEST | H | I | N | Z | V | C |
Branch Always | BRA | 20 | 4 | 2 | None | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Carry Clear | BCC | 24 | 4 | 2 | C = 0 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Carry Set | BCS | 25 | 4 | 2 | C = 1 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If = Zero | BEQ | 27 | 4 | 2 | Z = 1 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If ≧ Zero | BGE | 2C | 4 | 2 | N ⊕ V = 0 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If > Zero | BGT | 2E | 4 | 2 | Z ✚ (N ⊕ V) = 0 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Higher | BHI | 22 | 4 | 2 | C ✚ Z = 0 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If ≦ Zero | BLE | 2F | 4 | 2 | Z ✚ (N ⊕ V) = 1 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Lower or Same | BLS | 23 | 4 | 2 | C ✚ Z = 1 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If < Zero | BLT | 2D | 4 | 2 | N ⊕ V = 1 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Minus | BMI | 2B | 4 | 2 | N = 1 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Not Equal Zero | BNE | 26 | 4 | 2 | Z = 0 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Overflow Clear | BVC | 28 | 4 | 2 | V = 0 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Overflow Set | BVS | 29 | 4 | 2 | V = 1 | ● | ● | ● | ● | ● | ● | |||||||||
Branch If Plus | BPL | 2A | 4 | 2 | N = 0 | ● | ● | ● | ● | ● | ● | |||||||||
Branch To Subroutine | BSR | 8D | 4 | 2 | See Special Operations |
● | ● | ● | ● | ● | ● | |||||||||
Jump | JMP | 6E | 4 | 2 | 7E | 3 | 3 | ● | ● | ● | ● | ● | ● | |||||||
Jump To Subroutine | JSR | AD | 4 | 2 | BD | 3 | 3 | ● | ● | ● | ● | ● | ● | |||||||
No Operation | NOP | 01 | 2 | 1 | Advance Prog. Ctr. | ● | ● | ● | ● | ● | ● | |||||||||
Return From Interrupt | RTI | 3B | 10 | 1 | See Special Operations |
10 | 10 | 10 | 10 | 10 | 10 | |||||||||
Return From Subroutine | RTS | 39 | 5 | 1 | ● | ● | ● | ● | ● | ● | ||||||||||
Software Interrupt | SWI | 3D | 12 | 1 | ● | ● | ● | ● | ● | ● | ||||||||||
Wait For Interrupt | WAI | 3E | 9 | 1 | ● | 11 | ● | ● | ● | ● |
Condition Code Register Instructions |
ADDRESSING MODES | BOOLEAN | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
CONDITIONS CODE REGISTER | INHER | OPERATION | 5 | 4 | 3 | 2 | 1 | 0 | |||
OPERATIONS | MNEMONIC | OP | ~ | # | H | I | N | Z | V | C | |
Clear Carry | CLC | 0C | 2 | 1 | 0 ➜ C | ● | ● | ● | ● | ● | R |
Clear Interrupt Mask | CLI | 0E | 2 | 1 | 0 ➜ I | ● | R | ● | ● | ● | ● |
Clear Overflow | CLV | 0A | 2 | 1 | 0 ➜ V | ● | ● | ● | ● | R | ● |
Set Carry | SEC | 0D | 2 | 1 | 1 ➜ C | ● | ● | ● | ● | ● | S |
Set Interrupt Mask | SEI | 0F | 2 | 1 | 1 ➜ I | ● | S | ● | ● | ● | ● |
Set Overflow | SEV | 0B | 2 | 1 | 1 ➜ V | ● | ● | ● | ● | S | ● |
Acmltr A ➜ CCR | TAP | 06 | 2 | 1 | A ➜ CCR | 12 | 12 | 12 | 12 | 12 | 12 |
CCR ➜ Acmltr A | TPA | 07 | 2 | 1 | CCR ➜ A | ● | ● | ● | ● | ● | ● |
Legend and Conditional Code Register Notes |
CONDITION CODE REGISTER NOTES: | ||
(Bit set if test is true; cleared otherwise) | ||
1 | (bit V) | Test: Result = 10000000? |
2 | (Bit C) | Test: Result ≠ 00000000? |
3 | (Bit C) | Test: Decimal value of most significant BCD character greater than nine? (Not cleared if previously set) |
4 | (Bit V) | Test: Operand = 10000000 Prior to execution? |
5 | (Bit V) | Test: Operand = 01111111 Prior to execution? |
6 | (Bit V) | Test: Set equal to result of N ⊕ C after shift has occured. |
7 | (Bit N) | Test: Sign bit of most significant (MS) byte of result = 1? |
8 | (Bit V) | Test: 2's complement overflow from subtraction of MS bytes? |
9 | (Bit N) | Test: Result less than zero? (Bit 15 = 1) |
10 | (All) | Load Conditional Code Register from Stack (See Special Operations) |
11 | (Bit I) | Set when interrupt occurs. If previously set, a Non-Maskable Interrupt is required to exit the wait state. |
12 | ALL | Set according to the contents of Accumulator A. |
LEGEND: | 00 | Byte = Zero | |
OP | Operation Code (Hex); | H | Half carry from bit 3; |
~ | Number of MPU Cycles; | I | Interupt Mask; |
# | Number of Program Bytes; | N | Negative (sign bit); |
+ | Arithmetic Plus; | Z | Zero (byte); |
- | Arithmetic Minus; | V | Overflow, 2's complement; |
● | Boolean AND; | C | Carry from bit 7; |
MSP | Contents of memory location pointed to by the stack Pointer; |
↕ | Test and set if true, cleared otherwise; |
⊕ | Boolean Inclusive OR; | R | Reset Always; |
= | Boolean Exclusive OR; | S | Set Always; |
M | Complement of M; | ● | Not Affected; |
➜ | Transfer Into; | CCR | Condition Code Register; |
0 | Bit = 0; | LS | Least Significant; |
MS | Most Significant; |
Hexadecimal ⇔ Decimal Conversions |
Hexadecimal ⇔ Decimal Conversion | |||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
15 | Byte | 8 | 7 | Byte | 0 | ||||||||||||||||||
15 | Char | 12 | 11 | Char | 8 | 7 | Char | 4 | 3 | Char | 0 | ||||||||||||
HEX | DEC | HEX | DEC | HEX | DEC | HEX | DEC | ||||||||||||||||
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||||||||||||||||
1 | 4 | 096 | 1 | 256 | 1 | 16 | 1 | 1 | |||||||||||||||
2 | 8 | 192 | 2 | 512 | 2 | 32 | 2 | 2 | |||||||||||||||
3 | 12 | 288 | 3 | 768 | 3 | 48 | 3 | 3 | |||||||||||||||
4 | 16 | 384 | 4 | 1 | 024 | 4 | 64 | 4 | 4 | ||||||||||||||
5 | 20 | 480 | 5 | 1 | 280 | 5 | 80 | 5 | 5 | ||||||||||||||
6 | 24 | 576 | 6 | 1 | 536 | 6 | 96 | 6 | 6 | ||||||||||||||
7 | 28 | 672 | 7 | 1 | 792 | 7 | 112 | 7 | 7 | ||||||||||||||
8 | 32 | 768 | 8 | 2 | 048 | 8 | 128 | 8 | 8 | ||||||||||||||
9 | 36 | 864 | 9 | 2 | 304 | 9 | 144 | 9 | 9 | ||||||||||||||
A | 40 | 960 | A | 2 | 560 | A | 160 | A | 10 | ||||||||||||||
B | 45 | 056 | B | 2 | 816 | B | 176 | B | 11 | ||||||||||||||
C | 49 | 152 | C | 3 | 072 | C | 192 | C | 12 | ||||||||||||||
D | 53 | 248 | D | 3 | 328 | D | 208 | D | 13 | ||||||||||||||
E | 57 | 344 | E | 3 | 584 | E | 224 | E | 14 | ||||||||||||||
F | 61 | 440 | F | 3 | 840 | F | 240 | F | 15 |
How to use the tables
Conversion to Decimal: Find the decimal weights for corresponding hexadecimal characters beginning with the least significant character. The sum of the decimal weight is the decimal calue of the hexadecimal number.
Conversion to Hexadecimal: Find the highest decimal value in the table which is lower than or equal to the decimal number to be converted. The corresponding hexadecimal character is the most significant character. With the difference, repeat the process to find subsequent hexadecimal characters.
I have added selectable buttons to the conversion table above. There is a button on the left of each Hex character. This allows you to select a four digit Hexadecimal for conversion to Decimal. The results of this conversion are immediately displayed in the table below. In the Results section, at the bottom,
Hexadecimal ⇒ Decimal Conversion | ||||
---|---|---|---|---|
Bits 15-12 | Bits 11-8 | Bits 7-4 | Bits 3-0 | Decimal |
0 (0 × 4096) + 0 |
0 (0 × 256) + 0 |
0 (0 × 16) + 0 |
0 (0 × 1) = 0 |
0 |
This next calculator is for converting from Decimal to Hexadecimal. Just enter your Decimal number on the left and click anywhere outside the entry area. The Hexidecimal equivalent will be displayed on the right. The decimal number is limited to 0 to 65535. It will always display four hex digits.
Decimal ⇒ Hexadecimal Conversion | |
---|---|
Decimal Input | Hex Output |
Powers of Two / Powers of Sixteen / ASCII Character Set (7-Bit Code) |
POWERS OF TWO | |
---|---|
2N | N |
1 | 0 |
2 | 1 |
4 | 2 |
8 | 3 |
16 | 4 |
32 | 5 |
64 | 6 |
128 | 7 |
256 | 8 |
512 | 9 |
1,024 | 10 |
2,048 | 11 |
4,096 | 12 |
8,192 | 13 |
16,384 | 14 |
32,768 | 15 |
65,526 | 16 |
131,072 | 17 |
262,144 | 18 |
524,288 | 19 |
1,048,576 | 20 |
2,097,152 | 21 |
4,194,304 | 22 |
8,388,608 | 23 |
16,777,216 | 24 |
POWERS OF 16 | |
---|---|
16N | N |
1 | 0 |
16 | 1 |
256 | 2 |
4,096 | 3 |
65,536 | 4 |
1,048,576 | 5 |
16,777,216 | 6 |
268,435,456 | 7 |
4,294,967,296 | 8 |
68,719,476,736 | 9 |
1,099,511,627,776 | 10 |
17,592,186,044,416 | 11 |
281,474,976,710,656 | 12 |
4,503,599,627,370,496 | 13 |
72,057,594,037,927,936 | 14 |
1,152,921,504,606,846,976 | 15 |
ASCII CHARACTER SET (7-BIT CODE) | ||||||||
---|---|---|---|---|---|---|---|---|
MSB ⇒ LSB ⇓ |
0 000 |
1 001 |
2 010 |
3 011 |
4 100 |
5 101 |
6 110 |
7 111 |
0 0000 | NUL | DLE | SP | 0 | @ | P | ' | p |
1 0001 | SOH | DC1 | ! | 1 | A | Q | a | q |
2 0010 | STX | DC2 | " | 2 | B | R | b | r |
3 0011 | ETX | DC3 | # | 3 | C | S | c | s |
4 0100 | EOT | DC4 | $ | 4 | D | T | d | t |
5 0101 | ENQ | NAK | % | 5 | E | U | e | u |
6 0110 | ACK | SYN | & | 6 | F | V | f | v |
7 0111 | BEL | ETB | ^ | 7 | G | W | g | w |
8 1000 | BS | CAN | ( | 8 | H | X | h | x |
9 1001 | HT | EM | ) | 9 | I | Y | i | y |
A 1010 | LF | SUB | * | : | J | Z | j | z |
B 1011 | VT | ESC | + | ; | A | [ | k | { |
C 1100 | FF | FS | , | < | L | \ | l | | |
D 1101 | CR | GS | - | = | M | ] | m | } |
E 1110 | SO | RS | . | > | N | ^ | n | ~ |
F 1111 | SI | VS | / | ? | O | _ | o | DEL |