Introduction

The Motorola MC6820 Peripheral Interface Adapter is relatively complicated. It is used in almost every program available as an I/O device, so I thought it deserved a little extra attention.

When you are attempting to use a 6800 Microcomputer an interface adapter is often needed. You need to define early in your project exactly what you expect of the interface adapter. Things like what signals are inputs, what signals are output, are interrupts needed, etc.. That's because the configuration of the interface adapter is one of the things you need to do at the very beginning of your program.

You also need to be careful of interface adapters that are already in use. For example, if you intend to use the input and output routines in MIKBUG. MIKBUG uses the PIA at $8004. While it doesn't use all of the I/O signals, it may be difficult to insert your requirements, without messing up MIKBUGs configuration. Things are much easier if you have a completely separate PIA to work with.

Reset

In a 6800 computer system, all of the devices that pass data require some kind of initialization. Devices like the M6800 MPU, MC6820 Peripheral Interface Adapter (PIA), and the MC6850 Asynchronous Interface Adapter (ACIA). For most systems the Reset signal is common to all these devices and puts them in a known state.

The Reset signal is active low. That means it is normally high (logic 1) and, when activated, goes monentarily to a low (logic 0) level, followed by a return to the high level. When the Reset signal goes low, and back to high, the M6800 MPU is set to a reset condition. This causes the MPU to look at address $FFFE,$FFFF for the address of the initialization code. For MIKBUG, the address is $E0D0 (START).

That same transition (high to low and back to high) initializes the PIAs. This has the effect of zeroing all PIA registers. This will set PA0-PA7, PB0-PB7, CA2, and CB2 as inputs and all interrupts disabled. CA1 and CB1 are input only, so are not affected.

So, the first thing that needs to be done is the PIA needs to be configured. In the initialized state (after the Reset signa)), the Control Register (PIA_CRA = $8005) Bit 2 is "0". This provides access to the Data Direction Register (PIA_DDRA = $8004). This means that the initialization code can start by defining which bits are to be inputs and which are to be outputs. For MIKBUG, PA0 is used as an output and PA7 is used as an input.

MC6820 PIA Operation

The diagram on the right, is how I look at the MC6820 PIA. The PIA is relatively complex, so I needed to simplify my view. The diagram shows the A-Side and B-Side of the PIA. For the most part, the two sides are identical.

Each side of the PIA appears to the MPU as a pair of registers.

• Output Register A (PIAORA@$8008) and Control Register A (PIACRA@$8009) for the A-Side.
• Output Register B (PIAORB@$800A) and Control Register B (PIACRB@$800B) for the B-Side.

After a reset, all of the registers will be set to $00. This will put a "0" in b2 of the Control Register (A and B), which will allow the Data Direction Registers to be accessed through the Output Register (A and B). With the Data Direction Registers all zeros, all of the PA and PB data bits are defined as inputs. To define any of those inputs as outputs, write a "1" in that bit position.

Once the Data Direction Registers are set, "b2" of the Control Register (A and B) needs to be set to a "1". Then, any read or write to the Output Register (A and B) will write directly to PA0-PA7 and PB0-PB7. But if you just write to "b2", you will need to include that setting when you set the other bits in the Control Register (A and B). So it is usually easier to decide on the other Control Register (A and B) settings and just write to the register once.

The Control Register (A and B) contains bits for managing the external PIA signals CA1/CA2 and CB1/CB2. CA1 and CB1 are input only and are controlled by b1,b0 of the Control Register (A and B). CA2 and CB2 can be configured as a input or output and are controlled by b5,b4,b3 of the Control Register (A and B). The state of the IRQ bits in the Control Register (A and B) are controlled by the settings for CA1/CA2 and CB1/CB2. These are read only bits. They can be set by action on the CA/CB bits and are cleared by a MPU read.

Starting with CA1/CB1 these input bits can be used to set the Control Register bits IRQA1/IRQB1 (CR b7) and the external IRQA/IRQB signals

• b1=0,b0=0 - IRQA1/IRQB1 will be set (1) by a High-to-Low transition on CA1/CB1 and the external IRQA/IRQB signal will be disabled.
• b1=0,b0=1 - IRQA1/IRQB1 will be set (1) by a High-to-Low transition on CA1/CB1 and the external IRQA/IRQB signal will be enabled.
• b1=1,b0=0 - IRQA1/IRQB1 will be set (1) by a Low-to-High transition on CA1/CB1 and the external IRQA/IRQB signal will be disabled.
• b1=1,b0=1 - IRQA1/IRQB1 will be set (1) by a Low-to-High transition on CA1/CB1 and the external IRQA/IRQB signal will be enabled.

Peripheral Input lines CA1 and CB1 are input only lines that set the interrupt flags of the control registers. IRQA1/IRQA2 and IRQB1/IRQB2, respectively. The active transition for these signals is alwo programmed by the two control registers (b1 and b0).

The register PIAORA can access the A-Side Data Direction Register (DDR) or the Output Register (OR), depending on the state if b2 in the Control Register (CR).

After Reset, the CR is set to all "0"s. A "0" in b2 of the CR provides the MPU with access to the DDR through PIAORA ($8008). The MPU can then write a byte of data to configure the external signals PA7-PA0. A "0" in the DDR configures a bit as an input and a "1" configures the bit as an output. So, as an example, writing a $F0 (%1111 0000) to PIAORA ($8008) would define PA7-PA4 as outputs and PA3-PA0 as inputs.

SYMBOL OPC OPERAND COMMENT -------- ---- --------- ------------------------- PIACRA EQU $8009 ; PIA CONTROL PIAORA EQU $8008 ; PIA DATA : : : LDX #PIAORA ; (X) POINTER TO DEVICE INC 0,X ; SET DATA DIR PIAD LDAA #$7 STAA 1,X ; INIT CON PIAS INC 0,X ; MARK COM LINE STAA 2,X ; SET DATA DIR PIADB CONTRL LDAA #$34 STAA PIACRA ; SET CTRL PIASB TURN READ STAA PIADB ; SET TIMER INTERVAL LDS #STACK ; SET CONTRL STACK POINT : : : FDB START

The A-Side of the PIA also includes the external signals CA1, CA2, and IRQA and the internal signal IRQA1 (CR bit 7).

• CA1 is an input and it's operation is configured by bits b1 and b0 of the CR. With those control bits, the active level of CA1 can be set, and whether IRQA1 (CR bit 7) and the output IRQA are activated.
• CA2 can be configured as a input or output. It is be configured by bits b5, b4 and b3 of the CR. Similar to CA1, when configured as an input (CR b5=0) the active level of CA2 can be set, and whether IRQA2 (CR bit 6) and the output IRQA are activated. When configured as an output (CR b5=1)

The PIA includes CA1, CA2, and IRQA on the A-Side. And CB1, CB2,and IRQB on the B-Side. CA1 and CB1 are input only but CA2 CB2 can be configured as an input or an output. The operate And CB1, CB2,and IRQB on the B-Side. Internally, there is IRQA1 and IRQA2, on the A-Side and IRQB1 and IRQB2, on the B-Side. CA1 and CB1 are fixed as inputs and controls the operation

As previously discussed, PA0-PA7, CA1,and CA2 are defined as inputs and all interrupts are disabled.

The address bits CS0, CS1, and CS2 are used to address the PIA. RS0 and RS1 are used to select the internal register. The three control bits, R/W, Ena, and Reset, are used to manage the data in and out.

During initialization, you first need to set the Data Direction Register (DDR) for both sides. This is because the Control Register (CR) bit 2, is initilized to "0". That provides access to the DDR

b5	b4	b3	CA2	IRQA2-b6	IRQA (Ext)
0	0	0	Input	Active on CA2 ↓	Disabled
0	0	1	Input	Active on CA2 ↓
0	1	0	Input	Active on CA2 ↑	Disabled
0	1	1	Input	Active on CA2 ↑
1	0	0	Output	Active on CA2 ↓	Disabled
1	0	1	Output	Active on CA2 ↓
1	1	0	Output	Active on CA2 ↓	Disable
1	1	1	Output	Active on CA2 ↓

MC6820 PIA Initialization - Simple Example

The Motorola M6800 Microprocessor Application Manual contains a brief description of using a PIA to transfer data between two external peripheral devices. I will be using that example to show how a PIA might be initialized for data transfer. The drawing on the right is to help illustrate the setup. Below is a description of each external peripheral.

• Peripheral 1 sends data to the MPU via PA0-PA7 of the PIA. There are two control bits (Rdy and Acc) that aid in managing the transfer. These bits are connected to CA1 and CA2, respectively. When the peripheral has data is available, the RDY is activated. This sends an interrupt to the MPU indicating that there is data available and to read the PIA PA0-PA7 data lines. When the read operation is complete, the PIA CA2 signal is activated and sent to the peripheral (ACC).
• Peripheral 2 receives data from the MPU via PB0-PB7 of the PIA. There are two control bits (ACCD and RDY) that aid in managing the transfer. These bits are connected to CB1 and CB2, respectively. When the MPU has data available, the CB2-Data Ready signal is activated. This signals the peripheral that data is available. The peripheral is then expected to read the data and return the CB1-Data Accepted signal.

MIKBUG and the MC6820 PIA Initialization Example

The MIKBUG control program uses a MC6820 PIA at $8004 to $8007. It uses the PA section for serial communication and the PB section to interface with a MC14536 Timer IC. The Timer IC is used to manage the speed of the serial communications.

LINE ADDR OP OPER SYMBOL OPC OPERAND COMMENT ----- ---- -- ---- -------- ---- ---------------- ------------------------- 00020 8007 PIASB EQU $8007 00021 8006 PIADB EQU $8006 ; B DATA 00022 8005 PIAS EQU $8005 ; PIA STATUS 00023 8004 PIAD EQU $8004 ; PIA DATA : : : : : : : 00150 E0D0 START EQU * 00151 E0D0 8E A042 LDS #STACK 00152 E0D3 BF A008 STS SP ; INZ TARGET'S STACK PNTR 00153 ; INZ PIA 00154 E0D6 CE 8004 LDX #PIAD ; (X) POINTER TO DEVICE 00155 E0D9 6C 00 INC 0,X ; SET DATA DIR PIAD 00156 E0DB 86 07 LDAA #$7 00157 E0DD A7 01 STAA 1,X ; INIT CON PIAS 00158 E0DF 6C 00 INC 0,X ; MARK COM LINE 00159 E0E1 A7 02 STAA 2,X ; SET DATA DIR PIADB 00160 E0E3 86 34 CONTRL LDAA #$34 00161 E0E5 B7 8007 STAA PIASB ; SET CONTROL PIASB TURN READ 00162 E0E8 B7 8006 STAA PIADB ; SET TIMER INTERVAL 00163 E0EB 8E A042 LDS #STACK ; SET CONTRL STACK POINT : : : : : : : 00329 E1FE E0 D0 FDB START

The code on the right is the PIA initialization code used by MIKBUG. MIKBUG uses a MC6820 PIA, along with a MC14536 Timer IC, for Serial communication. The PIA resides at $8004 to $8007 and is strictly for use by MIKBUG. The MIKBUG software has relatively simple requirements. MIKBUG doesn't use interrupts so, on the MEK6800-D1 board, the PIA's IRQA and IRQB lines are not connected. The PIA Peripheral Data lines, PA1 and PA7, are used for Serial I/O and PB0, PB2, and PB7 are used to manage the MC14536 Time.

Upon Reset, the MPU get it's initial branch address from location $E1FE. This causes the MPU branch to location $E0D0 (START) The Initially, lines 151 and 152, the system Stack is initialized. Then, at line 154, the address of the PIA A-Data Register is loaded into the X-Register.

Simple I/O with the MC6820

The drawing on the right shows the MC6820 Peripheral Interface Adapter (PIA) schematically. On the left side are the connections to the MPU.

• D0 to D7 is a bi-directional data bus.
• CS0, CS1, and CS2 are chip select lines for addressing aparticular PIA.
• RS0 and RS1 are used in conjunction with the chip select lines to access particular registers within the PIA
• R/W and Ena are control signals used in conjunction with the chip select lines to access the PIA.
• Reset is used to initialize the PIA to a specific initial state. Configuration of the PIA can be simplified if you are starting from the Reset state.
• IRQ A and B are open collector

On the "Peripheral Side" of the PIA are two 8-Bit Data buses, (PA0-PA7 and PB0-PB7), and four interrupt/control lines,(CA1, CA2, CB1, CB2).