Introduction

The information below is directly from the Motorola MCM6830L7 MIKBUG/MINIBUG ROM Engineering Note 100 that was Prepared by Mike Wiles (Computer Systems) and Andre Felix (Support Products Group). All of the images have been redrawn and embedded typos fixed. - K7MEM

The information in this Engineering Note has been carefully reviewed and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, such information does not convey to the purchaser of the semiconductor devices described any license under the patent rights of Motorola Inc. or others. The material in this note is subject to change, and Motorola Inc., reserves the right to change specifications without notice. MIKBUG^® and MINIBUG^® are trademarks of Motorola Inc..

MCM6830L7 MIKBUG/MINIBUG ROM

The MIKBUG/MINIBUG ROM is an MCM6830 ROM of the MC6800 Family of parts. This ROM provides an asynchronous communications program, a loader prom, and a diagnostic program for use with the MEK6800 Microprocessing Unit.

1.0 SYSTEMS OVERVIEW

The MIKBUG/MINIBUG ROM provides the user with three separate firmware programs to interface with a serial asynchronous (start-stop) data communications device. They are:

1. MIKBUG Rev. 9
2. MINIBUG Rev. 4
3. Test Pattern

The map of the programs is shown in Figure 1-1. All enables for the ROM are active high.

2.0 FEATURE

The more important features of these programs are:

MIKBUG Rev. 9	MINIBUG Rev. 4
Memory Loader	Memory Loader
Memory Change	Memory Change
Go to Target Program	Go to Target Program
Print Registers of Target Program	Print Registers of Target Program
Operates with PIA for the Parallel-to-Serial Interface	Assumes a UART for the Parallel-to-Serial Interface
Print/Punch Dump
Restart/NMI/SWI Interrupt Vectors

3.0 HARDWARE CONFIGURATION

3.1 MIKBUG Hardware

The MIKBUG/MINIBUG ROM is intended for use with the MC6800 Microprocessing Unit in an M6800 Microcomputer system. This ROM, using the MIKBUG Firmware, should be connected into the system as illustrated in Figure 3-1. As shown, all of the enable inputs are high levels and the address line A9 on pin 15 is grounded. The MIKBUG Firmware in this ROM uses addresses E000 through E1FF. The ROM should be connected into a system so that its two top MIKBUG Firmware addresses also will respond to addresses FFFE and FFFF. This is required for the system to restart properly. There should not be any devices in the system at a higher address Man this ROM's addresses. Figure 3-2 depicts a memory map for a system using the MIKBUG Firmware and Figure 3-3 depicts this system's block diagram.

The MIKBUG Firmware operates with an MC6820 Peripheral Interface Adapter (PIA) as shown in Figure 3-4. The MC14536 device is used as the interface timer. This timer's interval is set by adjusting the 50 KΩ resistor and monitoring the output signal on pin 13 of the MC14536 device. The zero level of the timing pulse should be 9.1 ms for 10 characters per second (CPS) operation and 3.3 ms for 30 CPS operation. Also, pin 16 (PB6) of the MC6820 PIA should be connected to +5 volts for 10 CPS operation and ground for 30 CPS operation.

The MC1488 and MC1489A devices provide the system with RS-232C interface capability. If the system is to interface only with an RS-232C terminal, no other interface circuitry is required; however, a jumper should be strapped between E3 and E4. The 4N33 optical isolators and associated circuitry are required to interface with a 20 mA current loop TTY. A jumper should be connected between E1 and E2 for TTY operation.

The MIKBUG Firmware also requires random access memory for a stack and temporary memory storage. The MCM6810 RAM used for this memory should be configured for the base memory address at A000 hexadecimal.

A reset switch is required in the system to provide for restarting the MC6800 MPU and for resetting the MC6820 PIA. The function may be provided by a pushbutton switch and a cross-coupled latch flip-flop.

3.2 MINIBUG Hardware, Rev. 4

The MIKBUG/MINIBUG ROM is intended for use with the MC6800 Microprocessing Unit in an M6800 Microcomputer System. This system, using MINIBUG Firmware Rev. 4, should be set up with the starting ROM address at FE00 hexadecimal. The restart address generator (Figure 3-5) must be configured to respond with address FED6 each time the MPU requests the restart address. As shown, the system also requires an MCM6810 RAM for temporary storage. This RAM shall be configured for a FF00 base memory address. Figure 3-6 depicts a memory map for a system using the MINIBUG Rev. 4 Firmware.

The MINIBUG ROM Rev. 4 also uses a parallel-to-serial data converter to interface with an external terminal. The converter's status register must be located at address FCF4 and the data register at address FCF5. The least significant bit of the status register is used to indicate that the converter has received a character and the second bit indicates that the converter is ready for the next character to be transmitted.

4.0 SOFTWARE OPERATION

4.1 MIKBUG Operation

The MIKBUG Firmware may be used to debug and evaluate a user's program. The MIKBUG Firmware enables the user to perform the following functions:

• Memory Loader Function
• Memory Examine and Change Function
• Print/Punch Memory Function
• Display Contents of MPU Registers Function
• Go to User's Program Function
• Interrupt Request Function
• Non Maskable Interrupt Function

The operating procedures for each of these routines as well as the Reset Function are discussed in the following paragraphs. The MIKBUG Firmware is inhibited from performing the user's program except in the Go to User's Program Function and the interrupt functions.

4.1.1 RESET Function

Perform the RESET Function when power is first applied and any time the MIKBUG Firmware loses program control.

Press the RESET pushbutton switch. The MIKBUG Firmware should gain program control and the terminal should respond with a carriage return, a line feed and an asterisk. The MIKBUG control program is ready for an input.

4.1.2 Memory Loader Function

The Memory Loader Function of MIKBUG loads formatted binary object tapes or MIKBUG punched memory dump tapes into memory and if used, external memory modules. Figure 4-1 depicts the paper tape format. It is assumed at the start of this function that the MC6800 MPU is performing its MIKBUG control program and the last data printed by the terminal is an asterisk. Figure 4-2 illustrates a Typical Memory Loader Function.

Figure 4-2. Typical Memory Loader Function Note: The "L" and "S9" are user input. * L S113000020FE0202020202020202020202020202B0 S9 *

1. Load the tape into the terminal tape reader.
2. Set the tape reader switch to AUTO.
3. Enter the character L after the asterisk (*). This initiates the MIKBUG loading procedure. The MIKBUG Firmware ignores all characters prior to the start-of-record on the tape.

   NOTE

   Tapes punched by MIKBUG do not have an end-of-file character at the end of the record; therefore, you must type in the characters S9 to exit from the memory loader function, or push the RESET pushbutton switch.

   Checksum Error Detection

   If, during the loading function, the MIKBUG Firmware detects a checksum error, it instructs the terminal to print a question mark and then stops the tape reader.

4. If a checksum error is present, perform one of the following substeps:
   1. Press the RESET pushbutton switch and abort from the Memory Loader Function. The MPU will return to the MIKBUG control program and the terminal will print a carriage return, a line feed, and an asterisk.
   2. Reposition the tape and enter the character L. The record causing the checksum error is reread.
   3. Ignore the checksum error and enter the character L. The MIKBUG Firmware ignores the checksum error and continues the Memory Loader Function.

CAUTION

If a checksum error is in an address, and the continue option in substep 3 is selected, there is no certain way of determining where the data will be loaded into the memory.

4.1.3 Memory Examine and Change Function

Figure 4-3. Typical Memory Examine and Change Function Note: The first line below as well as the entries on the right, are user input. *M 0000 *0000 20 FF *0001 FE 00 *0002 02 . *0003 02 . *

The MIKBUG Firmware performs this function in three steps:

1. examining the contents of the selected memory location (opening the memory location);
2. changing the contents of this location, if required;
3. returning the contents to memory (closing the memory location).

The MIKBUG Firmware, in examining a memory location, instructs the terminal to print the contents of this memory location. The MIKBUG Firmware in this function displays each of the program instructions in machine language.

It is assumed at the start of this function that the MPU is performing its MIKBUG control program and the last data printed by the terminal is an asterisk. Figure 4-3, above, depicts a typical Memory Examine and Change Function.

NOTE

If the memory address selected is in ROM, PROM, or protected RAM, the contents of this memory location cannot be changed and the terminal will print a question mark.

1. Enter the character M after the asterisk to open a memory location. The terminal will insert a space after the M.
2. Enter in 4-character hexadecimal format the memory address to be opened. The terminal will print on the next line the memory address being opened and the contents of this memory location. The contents are in hexadecimal.
3. The operator must now decide whether to change the data at this memory location. If the data is to be changed, change the data in accordance with step d. If the data is not to be changed, the operator must decide whether to close this location and open the following memory location (step e) or to close this memory location and return to the MIKBUG control program (step f).
4. If the contents of this memory location are to be changed, enter a space code and then the new data (in hexadecimal format) to be stored at this location. The new contents are stored in memory and the terminal prints the following memory address and its contents. Return to step c.
5. To close the present memory and open the following memory location, enter any character except a space character after the displayed memory address contents. The contents are returned to memory and the terminal prints the following memory address and its contents. Return to step c.
6. To close the present memory location and return to the MIKBUG control program, enter a space code followed by a carriage return control character. The contents are returned to memory and the terminal prints an asterisk on the next line.

4.1.4 Print/Punch Memory Function

Figure 4-4. Typical Print/Punch Memory Function Note: The first line below as well as the entries on the right, and the P, are user input. *M A002 *A002 F7 00 *A003 6E 01 *A004 99 00 *A005 EE 10 *A006 A0 <SP> *P S1130001AA0202020202020202020202020202AC79 *

The Print/Punch Memory Function instructs the MIKBUG Firmware to punch an absolute formatted binary tape and to print the selected memory contents. The tape is formatted as shown in Figure 4-1 except that this tape does not contain an end-of-file control character.

The beginning address and the ending address must be entered into the memory. Memory addresses A002 and A003 are used to store the beginning address and addresses A004 and A005 are used to store the ending address.

It is assumed that the MPU is performing its MIKBUG control program and the last data printed by the terminal is an asterisk. Figure 4-4 illustrates a typical Print/Punch Memory Function.

NOTE

If you do not wish to punch a tape, turn off the terminal's tape reader.

1. Enter the character M after the asterisk to open a memory location. The terminal will insert a space code after the M.
2. Enter the address A002 after the space code. The terminal will print on the next line the memory address A002 and the contents of the address.
3. Enter a space code and the two most significant hexadecimal bytes of the beginning address after the contents of address A002. These two bytes are stored in memory and the terminal prints address A003 and its contents on the next line.
4. Enter a space code and the two least significant hexadecimal bytes of the beginning address after the contents of address A003. These two bytes are stored in memory and the terminal prints address A004 and its contents on the next line.
5. Enter a space code and the two most significant hexadecimal bytes of the ending address after the contents of address A004. These two bytes are stored in memory and the terminal prints address A005 and its contents on the next line.
6. Enter a space code and the two least significant hexadecimal bytes of the ending address after the contents of address A005. These two bytes are stored in memory and the terminal prints address A006 and its contents on the next line.
7. Enter a space code and carriage return character after the contents of address A006. The control returns to MIKBUG control program and the terminal prints an asterisk.
8. Enter the character P after the asterisk. The MIKBUG Firmware initiates the print/punch operation. At the conclusion of the print/punch operation the terminal prints an asterisk, and returns to the MIKBUG control program.

4.1.5 Display Contents of MPU Registers Function

Figure 4-5. Typical Display Contents of MPU Registers Function Note: The R in the first and last line, as well as the entries on the right, are user input. *R 8A D6 CE 87AE CF4B A042 *M A043 *A043 8A . *A044 D6 . *A045 CE . *A046 87 . *A047 AE . *A048 CF 00 *A049 4B 00 *A04A 9E <SP> *R 8A D6 CE 87AE 0000 A042 *

The Display Contents of MPU Registers Function enables the MIKBUG Firmware to display the contents of the MC6800 Microprocessing Unit registers for examination and change. It is assumed at the start of this function that the MPU is performing its MIKBUG control program and the last data printed by the terminal is an asterisk. Figure 4-5 illustrates a typical Display Contents of MPU Registers Function.

1. Enter the character R after the asterisk. The terminal will print the contents of the MPU registers in the following sequence: Condition Code Register, B Accumulator, A Accumulator, Index Register, Program Counter, and Stack Pointer. On the following line the terminal prints an asterisk.
2. If the contents of any of the registers are to be changed, change the data in accordance with Paragraph 4.1.3. It should be noted that the address of the stack pointer is stored last, and it takes eight memory locations to store the contents of the MPU registers on the stack. Figure 4-5 illustrates changing the contents of the MPU registers and identifies the location of each register's data.

4.1.6 Go to User's Program Function

This function enables the MPU to perform the user's program. It is assumed at the start of this function that the MPU is performing its MIKBUG control program and the data printed by the terminal is an asterisk.

Enter the character G after the asterisk. The MC6800 MPU System will perform the user's program until one of the following conditions occurs:

1. The MPU encounters a WAI (WAIt) instruction. The MPU now waits for a non-maskable interrupt or an interrupt request.
2. The MPU encounters a SWI (Software Interrupt) instruction. The MPU stores the data in the MPU registers on the stack and jumps to the MIKBUG control program. The terminal prints the contents of the MPU registers from the stack.
3. The RESET pushbutton switch is actuated. This switch is to be actuated when the user's program blows and places the MPU under the MIKBUG control program.

4.1.7 Interrupt Request Function

This function enables the user to evaluate a maskable interrupt routine. Steps a through e prepare the firmware to process an interrupt request and step f discusses performing the interrupt routine. It should be noted that this interrupt may be initiated at any time. It is assumed in preparing the MPU to process the interrupt request that the MPU is processing its MIKBUG control program and the last data printed by the terminal is an asterisk.

1. Enter the character M after the asterisk. The terminal will insert a space code after the M.
2. Enter the address A000. The terminal will print on the next line the memory address A000 and the contents of this memory location.
3. Enter a space code and the two most significant hexadecimal bytes of the first interrupt routine's address after the contents of address A000. These two bytes are stored in memory and the terminal prints address A001 and its contents on the next line.
4. Enter a space code and the two least significant hexadecimal bytes of the first interrupt routine's address after the contents of address A001. These two bytes are stored in memory and the terminal prints address A002 and its contents on the next line.
5. Enter a space code and a carriage return character after address A002. The MPU jumps to its MIKBUG control program and the terminal prints an asterisk. The MPU now is enabled and ready to perform a maskable interrupt routine when the interrupt mask is cleared. This interrupt routine may be initiated at any time either through the PIA (if enabled) or the IRQ input to the MPU. Initiating an interrupt through the PIA is discussed in the MC6820 Peripheral Interface Adapter data sheet while initiating an interrupt through the IRQ input is discussed below.
6. Ground IRQ input. If the interrupt mask is not set, the MPU will jump to the interrupt service routine indirectly through addresses A000 and A001. This is accomplished in MIKBUG by loading the index register with the contents of addresses A000 and A001 and then jumping to the address stored in the index register.
7. Remove the ground from the IRQ input:

4.1.8 Non-Maskable Interrupt Function

This function enables the user to evaluate a non-maskable interrupt routine. Steps a through e prepare the MC6800 MPU System to process a NMI (Non-Maskable Interrupt) input and step f discusses performing the interrupt routine. It is assumed in preparing the MC6800 MPU System to process a non-maskable interrupt that the MC6800 MPU System is processing its MIKBUG control program and the last data printed by the data terminal is an asterisk.

1. Enter the character M after the asterisk. The terminal will insert a space code after the M.
2. Enter the address A006. The terminal will print on the next line the memory address A006 and the contents of this memory location.
3. Enter a space code and the two most significant hexadecimal digits of the first interrupt routine's address after the contents of address A006. These two digits are stored in memory and the terminal prints address A007 and its contents on the next line.
4. Enter a space code and the two least significant hexadecimal digits of the first interrupt routine's address after the contents of address A007. These two digits are stored in memory and the terminal prints address A008 and its contents on the next line.
5. Enter a space code and a carriage return character after address A008. The MC6800 MPU System jumps to its MIKBUG control program and the terminal prints an asterisk.

The MC6800 MPU System now is enabled to perform a non-maskable interrupt routine. This non-maskable interrupt routine may be initiated at any time through the MC6800 MPU System NMI input.

6. Ground the NMI input P1-E. If the non-maskable interrupt is not disabled (E3 to E4), the MPU will jump to the interrupt service routine indirectly through addresses A006 and A007. This is accomplished in MIKBUG by loading the index register with the contents of addresses A006 and A007 and then jumping to the address stored in the index register.
7. Remove the ground from the NMI input P1-E.

4.2 MINIBUG Rev. 4 Operation

The MINIBUG Firmware enables the user's system using the MIKBUG/MINIBUG ROM to perform the following functions:

• Memory Loader Function
• Memory Examine and Change Function
• Display Contents of MPU Registers Function
• Go to User's Program Function

The operating procedures for each of these routines as well as the RESET Function are discussed in the following paragraphs.

4.2.1 RESET Function

Perform the RESET Function when power is first applied and any time the MINIBUG Firmware loses program control. Press the RESET switch (or equivalent). The MINIBUG Firmware should respond with a carriage return and a line feed character. The MINIBUG program control now is ready for an input.

4.2.2 Memory Loader Function

The memory loader function of MINIBUG loads formatted binary object tapes into memory. Figure 4-1 depicts the paper tape format. It is assumed at the start of this function that the MC6800 MPU is performing its MINIBUG control program. Figure 4-6 illustrates a typical memory loader function.

• Load the tape into the tape reader.
• Set the tape reader switch to AUTO.
• Enter the character L. This initiates the MINIBUG loading procedure. The MINIBUG program ignores all characters prior to the start-of-record on the tape.

Checksum Error Detection

If during the loading function, the MINIBUG Firmware detects a checksum error, it instructs the terminal to print a question mark and stops while the MPU performs the MINIBUG control program. To load the tape, the user will have to repeat the memory loader function.

4.2.3 Memory Examine and Change Function

The MINIBUG Firmware performs this function in three steps:

1. examining the contents of the selected memory location (opening the memory location);
2. changing the contents of this location, if required;
3. returning the contents to memory (closing the memory location).

The Firmware, in examining a memory location, instructs the terminal to print the contents of this memory location in hexadecimal format. The MINIBUG Firmware in this function displays each of the program instructions in Machine language.

It is assumed at the start of this function that the MPU is performing its MINIBUG control program. Figure 4-7 depicts a typical Memory Examine and Change Function.

NOTE

If no memory, a ROM, or a PROM is located at the selected address, the contents of this memory address cannot be changed and the terminal will print a question mark.

1. Enter the character M. The terminal will insert a space code after the M.
2. Enter in 4-character hexadecimal the memory address to be opened. The terminal will print a space code and then the contents of this memory location. The contents are in hexadecimal.
3. The operator must now decide whether to change the data at this memory location. If the data is to be changed, enter the two new hexadecimal characters to be stored in this location. The new contents are stored in memory and the MPU returns to the MINIBUG control program. If the data is not to be changed, enter a carriage return character; the previous contents are returned to memory and the MPU returns to the MINIBUG control program.

4.2.4 Display Contents of MPU Registers Function

The Display Contents of MPU Registers Function enables the MINIBUG Firmware to display the contents of the MC6800 Microprocessing Unit registers for examination and change. It is assumed at the start of this function that the MPU is performing the MINIBUG control program. Figure 4-8 illustrates a typical Display Contents of MPU Registers Function.

SP Contents MPU Register FF29 00 Condition Code Register FF2A 00 B Accumulator FF2B 00 A Accumulator FF2C 00 Index Register High FF2D 00 Index Register Low FF2E F0 Program Counter High FF2F 00 Program Counter Low

1. Enter the character P. The terminal will print the contents of the MPU registers in the following sequence:
2. Use the Memory Examine and Change Function in paragraph 4.2.3 to change the contents of a register.

4.2.5 Go to User's Program Function

This function enables the MPU to perform the user's program. It is assumed at the start of this function that the MPU is performing its MINIBUG control program. Figure 4-9 illustrates a typical Go to User's Program Function.

Enter the character G. The MPU will load the MPU registers with the contents identified in Paragraph 4.2.4 and then start running the user's program at the address in the program counter (locations FF2E and FF2F). The program counter may be changed using the Memory Examine and Change Function in Paragraph 4.2.3.

5.0 MIKBUG Rev. 9 Program Listing

Options have been added to the original Motorola code to generate a S19 file and a Intel Hex file. These options are only included in the MC6800 SH/GAWK Cross Assembler. - MEM

LINE ADDR OP OPER SYMBOL OPC OPERAND COMMENT ----- ---- -- ---- -------- ---- ---------------- ------------------------- 00001 NAME MIKBUG 00002 ; REV 009 00003 ; COPYRIGHT 1974 BY MOTOROLA INC 00004 ; 00005 ; MIKBUG (TM) 00006 ; 00007 ; L LOAD 00008 ; G GO TO TARGET PROGRAM 00009 ; M MEMORY CHANGE 00010 ; P PRINT/PUNCH DUMP 00011 ; R DISPLAY CONTENTS OF TARGET STACK 00012 ; CC B A X P S 00013 ; 00014 ; S19 Start Address, End Address, and Jump Address. 00015 OPT S0_HDR,S1_STA=$E000,S1_END=$E200,S9_JMP=$E0D0 00016 ; 00017 ; Intel Hex Start Address, End Address. 00018 OPT IHEX_STA=$E000,IHEX_END=$E200 00019 ; 00020 8007 PIASB EQU $8007 00021 8006 PIADB EQU $8006 ; B DATA 00022 8005 PIAS EQU $8005 ; PIA STATUS 00023 8004 PIAD EQU $8004 ; PIA DATA 00024 ; OPT MEMORY 00025 E000 ORG $E000 00026 ; 00027 ; I/O INTERRUPT SEQUENCE 00028 E000 FE A000 IO LDX IOV 00029 E003 6E 00 JMP 0,X 00030 ; 00031 ; NMI SEQUENCE 00032 E005 FE A006 POWDWN LDX NIO ; GET NMI VECTOR 00033 E008 6E 00 JMP 0,X 00034 E00A LOAD EQU * 00035 E00A 86 3C LDAA #$3C 00036 E00C B7 8007 STAA PIASB ; READER RELAY ON 00037 E00F 86 11 LDAA #@21 00038 E011 8D 62 BSR OUTCH ; OUTPUT CHAR 00039 E013 8D 63 LOAD3 BSR INCH 00040 E015 81 53 CMPA #'S 00041 E017 26 FA BNE LOAD3 ; 1ST CHAR NOT (S) 00042 E019 8D 5D BSR INCH ; READ BYTE 00043 E01B 81 39 CMPA #'9 00044 E01D 27 25 BEQ LOAD21 00045 E01F 81 31 CMPA #'1 00046 E021 26 F0 BNE LOAD3 ; 2ND CHAR NOT (1) 00047 E023 7F A00A CLR CKSM ; ZERO CHECKSUM 00048 E026 8D 2D BSR BYTE ; READ BYTE 00049 E028 80 02 SUBA #2 00050 E02A B7 A00B STAA BYTECT ; BYTE COUNT 00051 ; BUILD ADDRESS 00052 E02D 8D 18 BSR BADDR 00053 ; STORE DATA 00054 E02F 8D 24 LOAD11 BSR BYTE 00055 E031 7A A00B DEC BYTECT 00056 E034 27 05 BEQ LOAD15 ; ZERO BYTE COUNT 00057 E036 A7 00 STAA 0,X ; STORE DATA 00058 E038 08 INX 00059 E039 20 F4 BRA LOAD11 00060 ; 00061 E03B 7C A00A LOAD15 INC CKSM 00062 E03E 27 D3 BEQ LOAD3 00063 E040 86 3F LOAD19 LDAA #'? ; PRINT QUESTION MARK 00064 E042 8D 31 BSR OUTCH 00065 E044 LOAD21 EQU * 00066 E044 7E E0E3 C1 JMP CONTRL 00067 ; BUILD ADDRESS 00068 E047 8D 0C BADDR BSR BYTE ; READ 2 FRAMES 00069 E049 B7 A00C STAA XHI 00070 E04C 8D 07 BSR BYTE 00071 E04E B7 A00D STAA XLOW 00072 E051 FE A00C LDX XHI ; (X) ADDESS WE BUILT 00073 E054 39 RTS 00074 ; INPUT BYTE (TWO FRAMES) 00075 E055 8D 53 BYTE BSR INHEX ; GET HEX CHAR 00076 E057 48 ASLA 00077 E058 48 ASLA 00078 E059 48 ASLA 00079 E05A 48 ASLA 00080 E05B 16 TAB 00081 E05C 8D 4C BSR INHEX 00082 E05E 1B ABA 00083 E05F 16 TAB 00084 E060 FB A00A ADDB CKSM 00085 E063 F7 A00A STAB CKSM 00086 E066 39 RTS 00087 E067 44 OUTHL LSRA ; OUT HEX LEFT BCD DIGIT 00088 E068 44 LSRA 00089 E069 44 LSRA 00090 E06A 44 LSRA 00091 ; 00092 E06B 84 0F OUTHR ANDA #$F ; OUT HEX RIGHT BCD DIGIT 00093 E06D 8B 30 ADDA #$30 00094 E06F 81 39 CMPA #$39 00095 E071 23 02 BLS OUTCH 00096 E073 8B 07 ADDA #$7 00097 ; OUTPUT ONE CHAR 00098 E075 7E E1D1 OUTCH JMP OUTEEE 00099 E078 7E E1AC INCH JMP INEEE 00100 ; PRINT DATA POINTED AT BY X-REG 00101 E07B 8D F8 PDATA2 BSR OUTCH 00102 E07D 08 INX 00103 E07E A6 00 PDATA1 LDAA 0,X 00104 E080 81 04 CMPA #4 00105 E082 26 F7 BNE PDATA2 00106 E084 39 RTS ; STOP ON EOT 00107 ; CHANGE MEMORY (M AAAA DD NN) 00108 E085 8D C0 CHANGE BSR BADDR ; BUILT ADDRESS 00109 E087 CE E19D CHA51 LDX #MCL 00110 E08A 8D F2 BSR PDATA1 ; C/R L/F 00111 E08C CE A00C LDX #XHI 00112 E08F 8D 37 BSR OUT4HS ; PRINT ADRESS 00113 E091 FE A00C LDX XHI 00114 E094 8D 34 BSR OUT2HS ; PRINT DATA (OLD) 00115 E096 FF A00C STX XHI ; SAVE DATA ADDRESS 00116 E099 8D DD BSR INCH ; INPUT ONE CHAR 00117 E09B 81 20 CMPA #$20 00118 E09D 26 E8 BNE CHA51 ; NOT SPACE 00119 E09F 8D B4 BSR BYTE ; INPUT NEW DATA 00120 E0A1 09 DEX 00121 E0A2 A7 00 STAA 0,X ; CHANGE MEMORY 00122 E0A4 A1 00 CMPA 0,X 00123 E0A6 27 DF BEQ CHA51 ; DID CHANGE 00124 E0A8 20 96 BRA LOAD19 ; NOT CHANGED 00125 ; 00126 ; INPUT HEX CHAR 00127 E0AA 8D CC INHEX BSR INCH 00128 E0AC 80 30 SUBA #$30 00129 E0AE 2B 94 BMI C1 ; NOT HEX 00130 E0B0 81 09 CMPA #$09 00131 E0B2 2F 0A BLE IN1HG 00132 E0B4 81 11 CMPA #$11 00133 E0B6 2B 8C BMI C1 ; NOT HEX 00134 E0B8 81 16 CMPA #$16 00135 E0BA 2E 88 BGT C1 ; NOT HEX 00136 E0BC 80 07 SUBA #7 00137 E0BE 39 IN1HG RTS 00138 ; 00139 E0BF A6 00 OUT2H LDAA 0,X ; OUTPUT 2 HEX CHAR 00140 E0C1 8D A4 OUT2HA BSR OUTHL ; OUT LEFT HEX CHAR 00141 E0C3 A6 00 LDAA 0,X 00142 E0C5 08 INX 00143 E0C6 20 A3 BRA OUTHR ; OUTPUT RIGHT HEX CHAR 00144 E0C8 8D F5 OUT4HS BSR OUT2H ; OUTPUT 4 HEX CHAR + SPACE 00145 E0CA 8D F3 OUT2HS BSR OUT2H ; OUTPUT 2 HEX CHAR + SPACE 00146 E0CC 86 20 OUTS LDAA #$20 ; SPACE 00147 E0CE 20 A5 BRA OUTCH ; (BSR & RTS) 00148 ; 00149 ; ENTER POWER ON SEQUENCE 00150 E0D0 START EQU * 00151 E0D0 8E A042 LDS #STACK 00152 E0D3 BF A008 STS SP ; INZ TARGET'S STACK PNTR 00153 ; INZ PIA 00154 E0D6 CE 8004 LDX #PIAD ; (X) POINTER TO DEVICE 00155 E0D9 6C 00 INC 0,X ; SET DATA DIR PIAD 00156 E0DB 86 07 LDAA #$7 00157 E0DD A7 01 STAA 1,X ; INIT CON PIAS 00158 E0DF 6C 00 INC 0,X ; MARK COM LINE 00159 E0E1 A7 02 STAA 2,X ; SET DATA DIR PIADB 00160 E0E3 86 34 CONTRL LDAA #$34 00161 E0E5 B7 8007 STAA PIASB ; SET CONTROL PIASB TURN READ 00162 E0E8 B7 8006 STAA PIADB ; SET TIMER INTERVAL 00163 E0EB 8E A042 LDS #STACK ; SET CONTRL STACK POINT 00164 E0EE CE E19C LDX #MCLOFF 00165 E0F1 8D 8B BSR PDATA1 ; PRINT DATA STRING 00166 E0F3 8D 83 BSR INCH ; READ CHARACTER 00167 E0F5 16 TAB 00168 E0F6 8D D4 BSR OUTS ; PRINT SPACE 00169 E0F8 C1 4C CMPB #'L 00170 E0FA 26 03 BNE *+5 00171 E0FC 7E E00A JMP LOAD 00172 E0FF C1 4D CMPB #'M 00173 E101 27 82 BEQ CHANGE 00174 E103 C1 52 CMPB #'R 00175 E105 27 18 BEQ PRINT ; STACK 00176 E107 C1 50 CMPB #'P 00177 E109 27 32 BEQ PUNCH ; PRINT/PUNCH 00178 E10B C1 47 CMPB #'G 00179 E10D 26 D4 BNE CONTRL 00180 E10F BE A008 LDS SP ; RESTORE PGM'S STACK POINTER 00181 E112 3B RTI ; GO 00182 ; 00183 ; ENTER FROM SOFTWARE INTERRUPT 00184 E113 SFE EQU * 00185 E113 BF A008 STS SP ; SAVE TARGET'S STACK POINTER 00186 ; DECREMENT P-COUNTER 00187 E116 30 TSX 00188 E117 6D 06 TST 6,X 00189 E119 26 02 BNE *+4 00190 E11B 6A 05 DEC 5,X 00191 E11D 6A 06 DEC 6,X 00192 ; 00193 ; PRINT CONTENTS OF STACK 00194 E11F FE A008 PRINT LDX SP 00195 E122 08 INX 00196 E123 8D A5 BSR OUT2HS ; CONDITION CODES 00197 E125 8D A3 BSR OUT2HS ; ACC- B 00198 E127 8D A1 BSR OUT2HS ; ACC-A 00199 E129 8D 9D BSR OUT4HS ; X-REG 00200 E12B 8D 9B BSR OUT4HS ; P-COUNTER 00201 E12D CE A008 LDX #SP 00202 E130 8D 96 BSR OUT4HS ; STACK POINTER 00203 E132 20 AF C2 BRA CONTRL 00204 ; 00205 ; PUNCH DUMP 00206 ; PUNCH FROM BEGINNING ADDRESS (BEGA) THRU 00207 ; ADDRESS (ENDA) 00208 E134 0D MTAPE1 FCB $0D,$0A,$00,$00,$00,$00,'S,'1,$04; ; PUNCH FORMAT 00209 E135 0A 00210 E136 00 00211 E137 00 00212 E138 00 00213 E139 00 00214 E13A 53 00215 E13B 31 00216 E13C 31 00217 E13D PUNCH EQU * 00218 E13D 86 12 LDAA #$12 ; TURN TTY PUNCH ON 00219 E13F BD E075 JSR OUTCH ; OUT CHARACTER 00220 E142 FE A002 LDX BEGA 00221 E145 FF A00F STX TW ; TEMP BEGINING ADDRESS 00222 E148 B6 A005 PUN11 LDAA ENDA+1 00223 E14B B0 A010 SUBA TW+1 00224 E14E F6 A004 LDAB ENDA 00225 E151 F2 A00F SBCB TW 00226 E154 26 04 BNE PUN22 00227 E156 81 10 CMPA #16 00228 E158 25 02 BCS PUN23 00229 E15A 86 0F PUN22 LDAA #15 00230 E15C 8B 04 PUN23 ADDA #4 00231 E15E B7 A011 STAA MCONT ; FRAME COUNT THIS RECORD 00232 E161 80 03 SUBA #3 00233 E163 B7 A00E STAA TEMP ; BYTE COUNT THIS RECORD 00234 ; PUNCH C/R, L/F, NULL, S, 1 00235 E166 CE E134 LDX #MTAPE1 00236 E169 BD E07E JSR PDATA1 00237 E16C 5F CLRB ; ZERO CHECKSUM 00238 ; PUNCH FRAME COUNT 00239 E16D CE A011 LDX #MCONT 00240 E170 8D 25 BSR PUNT2 ; PUNCH 2 HEX CHAR 00241 ; PUNCH ADDRESS 00242 E172 CE A00F LDX #TW 00243 E175 8D 20 BSR PUNT2 00244 E177 8D 1E BSR PUNT2 00245 ; PUNCH DATA 00246 E179 FE A00F LDX TW 00247 E17C 8D 19 PUN32 BSR PUNT2 ; PUNCH ONE BYTE (2 FRAMES) 00248 E17E 7A A00E DEC TEMP ; DEC BYTE COUNT 00249 E181 26 F9 BNE PUN32 00250 E183 FF A00F STX TW 00251 E186 53 COMB 00252 E187 37 PSHB 00253 E188 30 TSX 00254 E189 8D 0C BSR PUNT2 ; PUNCH CHECKSUM 00255 E18B 33 PULB ; RESTORE STACK 00256 E18C FE A00F LDX TW 00257 E18F 09 DEX 00258 E190 BC A004 CPX ENDA 00259 E193 26 B3 BNE PUN11 00260 E195 20 9B BRA C2 ; JMP TO CONTROL 00261 ; PUNCH 2 HEX CHAR, UPDATE CHECKSUM 00262 E197 EB 00 PUNT2 ADDB 0,X ; UPDATE CHECKSUM 00263 E199 7E E0BF JMP OUT2H ; OUTPUT TWO HEX CHAR AND RTS 00264 E19C 13 MCLOFF FCB $13 ; READER OFF 00265 E19D 0D MCL FCB $0D,$0A,$14,$00,$00,$00,$2A,$04; ; C/R, L/F, PUNCH 00266 E19E 0A 00267 E19F 14 00268 E1A0 00 00269 E1A1 00 00270 E1A2 00 00271 E1A3 2A 00272 E1A4 2A 00273 ; 00274 E1A5 FF A012 SAV STX XTEMP 00275 E1A8 CE 8004 LDX #PIAD 00276 E1AB 39 RTS 00277 ; INPUT ONE CHAR INTO A-REGISTER 00278 E1AC 37 INEEE PSHB ; SAVE ACC-B 00279 E1AD 8D F6 BSR SAV ; SAV XR 00280 E1AF A6 00 IN1 LDAA 0,X ; LOOK FOR START BIT 00281 E1B1 2B FC BMI IN1 00282 E1B3 6F 02 CLR 2,X ; SET COUNTE FOR HALF BIT TIME 00283 E1B5 8D 3C BSR DE ; START TIMER 00284 E1B7 8D 36 BSR DEL ; DELAY HALF BIT TIME 00285 E1B9 C6 04 LDAB #4 ; SET DEL FOR FULL BIT TIME 00286 E1BB E7 02 STAB 2,X 00287 E1BD 58 ASLB ; SET UP CNTR WITH 8 00288 E1BE 8D 2F IN3 BSR DEL ; WAIT ONE CHAR TIME 00289 E1C0 0D SEC ; MARK COM LINE 00290 E1C1 69 00 ROL 0,X ; GET BIT INTO CFF 00291 E1C3 46 RORA ; CFF TO AR 00292 E1C4 5A DECB 00293 E1C5 26 F7 BNE IN3 00294 E1C7 8D 26 BSR DEL ; WAIT FOR STOP BIT 00295 E1C9 84 7F ANDA #$7F ; RESET PARITY BIT 00296 E1CB 81 7F CMPA #$7F 00297 E1CD 27 E0 BEQ IN1 ; IF RUBOUT, GET NEXT CHAR 00298 E1CF 20 12 BRA IOUT2 ; GO RESTORE REG 00299 ; OUTPUT ONE CHARACTER 00300 E1D1 37 OUTEEE PSHB ; SAV BR 00301 E1D2 8D D1 BSR SAV ; SAV XR 00302 E1D4 C6 0A IOUT LDAB #$A ; SET UP COUNTER 00303 E1D6 6A 00 DEC 0,X ; SET START BIT 00304 E1D8 8D 19 BSR DE ; START TIMER 00305 ; 00306 E1DA 8D 13 OUT1 BSR DEL ; DELAY ONE BIT TIME 00307 E1DC A7 00 STAA 0,X ; PUT OUT ONE DATA BIT 00308 E1DE 0D SEC ; SET CARRY BIT 00309 E1DF 46 RORA ; SHIFT IN NEXT BIT 00310 E1E0 5A DECB ; DECREMENT COUNTER 00311 E1E1 26 F7 BNE OUT1 ; TEST FOR 0 00312 E1E3 E6 02 IOUT2 LDAB 2,X ; TEST FOR STOP BITS 00313 E1E5 58 ASLB ; SHIFT BIT TO SIGN 00314 E1E6 2A 02 BPL IOS ; BRANCH FOR 1 STOP BIT 00315 E1E8 8D 05 BSR DEL ; DELAY FOR STOP BITS 00316 E1EA FE A012 IOS LDX XTEMP ; RES XR 00317 E1ED 33 PULB ; RESTORE BR 00318 E1EE 39 RTS 00319 ; 00320 E1EF 6D 02 DEL TST 2,X ; IS TIME UP 00321 E1F1 2A FC BPL DEL 00322 E1F3 6C 02 DE INC 2,X ; RESET TIMER 00323 E1F5 6A 02 DEC 2,X 00324 E1F7 39 RTS 00325 ; 00326 E1F8 E0 00 FDB IO 00327 E1FA E1 13 FDB SFE 00328 E1FC E0 05 FDB POWDWN 00329 E1FE E0 D0 FDB START 00330 ; 00331 A000 ORG $A000 00332 A000 0002 IOV RMB 2 ; IO INTERRUPT POINTER 00333 A002 0002 BEGA RMB 2 ; BEGINING ADDR PRINT/PUNCH 00334 A004 0002 ENDA RMB 2 ; ENDING ADDR PRINT/PUNCH 00335 A006 0002 NIO RMB 2 ; NMI INTERRUPT POINTER 00336 A008 0001 SP RMB 1 ; S-HIGH 00337 A009 0001 RMB 1 ; S-LOW 00338 A00A 0001 CKSM RMB 1 ; CHECKSUM 00339 A00B 0001 BYTECT RMB 1 ; BYTE COUNT 00340 A00C 0001 XHI RMB 1 ; XREG HIGH 00341 A00D 0001 XLOW RMB 1 ; XREG LOW 00342 A00E 0001 TEMP RMB 1 ; CHAR COUNT (INADD) 00343 A00F 0002 TW RMB 2 ; TEMP/ 00344 A011 0001 MCONT RMB 1 ; TEMP 00345 A012 0002 XTEMP RMB 2 ; X-REG TEMP STORAGE 00346 A014 002E RMB 46 00347 A042 0001 STACK RMB 1 ; STACK POINTER 00348 A043 END Total Errors: 0 --------------------------------------------------------------------------- | Symbol - Value | Symbol - Value | Symbol - Value | |------------------------+-------------------------+------------------------| | BADDR - $E047 | IOV - $A000 | PDATA2 - $E07B | | BEGA - $A002 | LOAD - $E00A | PIAD - $8004 | | BYTE - $E055 | LOAD11 - $E02F | PIADB - $8006 | | BYTECT - $A00B | LOAD15 - $E03B | PIAS - $8005 | | C1 - $E044 | LOAD19 - $E040 | PIASB - $8007 | | C2 - $E132 | LOAD21 - $E044 | POWDWN - $E005 | | CHA51 - $E087 | LOAD3 - $E013 | PRINT - $E11F | | CHANGE - $E085 | MCL - $E19D | PUN11 - $E148 | | CKSM - $A00A | MCLOFF - $E19C | PUN22 - $E15A | | CONTRL - $E0E3 | MCONT - $A011 | PUN23 - $E15C | | DE - $E1F3 | MTAPE1 - $E134 | PUN32 - $E17C | | DEL - $E1EF | NIO - $A006 | PUNCH - $E13D | | ENDA - $A004 | OUT1 - $E1DA | PUNT2 - $E197 | | IN1 - $E1AF | OUT2H - $E0BF | SAV - $E1A5 | | IN1HG - $E0BE | OUT2HA - $E0C1 | SFE - $E113 | | IN3 - $E1BE | OUT2HS - $E0CA | SP - $A008 | | INCH - $E078 | OUT4HS - $E0C8 | STACK - $A042 | | INEEE - $E1AC | OUTCH - $E075 | START - $E0D0 | | INHEX - $E0AA | OUTEEE - $E1D1 | TEMP - $A00E | | IO - $E000 | OUTHL - $E067 | TW - $A00F | | IOS - $E1EA | OUTHR - $E06B | XHI - $A00C | | IOUT - $E1D4 | OUTS - $E0CC | XLOW - $A00D | | IOUT2 - $E1E3 | PDATA1 - $E07E | XTEMP - $A012 | ---------------------------------------------------------------------------

6.0 MINIBUG Rev. 4 Program Listing

Options have been added to the original Motorola code to generate a S19 file and a Intel Hex file. These options are only included in the MC6800 SH/GAWK Cross Assembler. - MEM

LINE ADDR OP OPER SYMBOL OPC OPERAND COMMENT ----- ---- -- ---- -------- ---- ---------------- ------------------------- 00001 NAME MINIBUG 00002 ; MINI-BUG 00003 ; COPYWRITE 1973, MOTOROLA INC 00004 ; REV 004 (USED WITH MIKBUG) 00005 ; S19 Start Address, End Address, and Jump Address. 00006 OPT S0_HDR,S1_STA=$FE00,S1_END=$FF00,S9_JMP=$E0D0 00007 ; 00008 ; Intel Hex Start Address, End Address. 00009 OPT IHEX_STA=$FE00,IHEX_END=$FF00 00010 ; 00011 FCF4 ACIACS EQU @176364 ; ACIA CONTROL/STATUS 00012 FCF5 ACIADA EQU ACIACS+1 00013 ; 00014 FE00 ORG $FE00 00015 ; MINIBUG 00016 ; INPUT ONE CHAR INTO A-REGISTER 00017 FE00 B6 FCF4 INCH LDAA ACIACS 00018 FE03 47 ASRA 00019 FE04 24 FA BCC INCH ; RECEIVE NOT READY 00020 FE06 B6 FCF5 LDAA ACIADA ; INPUT CHARACTER 00021 FE09 84 7F ANDA #$7F ; RESET PARITY BIT 00022 FE0B 81 7F CMPA #$7F 00023 FE0D 27 F1 BEQ INCH 00024 FE0F 7E FEAE JMP OUTCH ; ECHO CHAR 00025 ; INPUT HEX CHAR 00026 FE12 8D EC INHEX BSR INCH 00027 FE14 81 30 CMPA #$30 00028 FE16 2B 52 BMI C1 ; NOT HEX 00029 FE18 81 39 CMPA #$39 00030 FE1A 2F 0A BLE IN1HG 00031 FE1C 81 41 CMPA #$41 00032 FE1E 2E 4A BGT C1 ; NOT HEX 00033 FE20 81 46 CMPA #$46 00034 FE22 2E 46 BGT C1 ; NOT HEX 00035 FE24 80 07 SUBA #7 00036 FE26 39 IN1HG RTS 00037 ; 00038 FE27 86 D1 LOAD LDAA #$D1 ; TURN READER ON 00039 FE29 B7 FCF4 STAA ACIACS 00040 FE2C 86 21 LDAA #$21 00041 FE2E 8D 7E BSR OUTCH 00042 FE30 8D CE LOAD3 BSR INCH 00043 FE32 81 53 CMPA #'S 00044 FE34 26 FA BNE LOAD3 ; 1ST CHAR NOT (S) 00045 FE36 8D C8 BSR INCH ; READ CHAR 00046 FE38 81 39 CMPA #'9 00047 FE3A 27 25 BEQ LOAD21 00048 FE3C 81 31 CMPA #'1 00049 FE3E 26 F0 BNE LOAD3 ; 2ND CHAR NOT (1) 00050 FE40 7F FF32 CLR CKSM ; ZERO CHECKSUM 00051 FE43 8D 36 BSR BYTE ; READ BYTE 00052 FE45 80 02 SUBA #2 00053 FE47 B7 FF33 STAA BYTECT ; BYTE COUNT 00054 ; BUILD ADDRESS 00055 FE4A 8D 21 BSR BADDR 00056 ; STORE DATA 00057 FE4C 8D 2D LOAD11 BSR BYTE 00058 FE4E 7A FF33 DEC BYTECT 00059 FE51 27 05 BEQ LOAD15 ; ZERO BYTE COUNT 00060 FE53 A7 00 STAA 0,X ; STORE DATA 00061 FE55 08 INX 00062 FE56 20 F4 BRA LOAD11 00063 FE58 7C FF32 LOAD15 INC CKSM 00064 FE5B 27 D3 BEQ LOAD3 00065 FE5D 86 3F LOAD19 LDAA #'? ; PRINT QUESTION MARK 00066 FE5F 8D 4D BSR OUTCH 00067 FE61 86 B1 LOAD21 LDAA #$B1 ; TURN READER OFF 00068 FE63 B7 FCF4 STAA ACIACS 00069 FE66 86 13 LDAA #@23 00070 FE68 8D 44 BSR OUTCH 00071 FE6A 7E FEDB C1 JMP CONTRL 00072 ; BUILD ADDRESS 00073 FE6D 8D 0C BADDR BSR BYTE ; READ 2 FRAMES 00074 FE6F B7 FF34 STAA XHI 00075 FE72 8D 07 BSR BYTE 00076 FE74 B7 FF35 STAA XLOW 00077 FE77 FE FF34 LDX XHI ; (X) ADDRESS WE BUILT 00078 FE7A 39 RTS 00079 ; INPUT BYTE (TWO FRAMES) 00080 FE7B 8D 95 BYTE BSR INHEX ; GET HEX CHAR 00081 FE7D 48 ASLA 00082 FE7E 48 ASLA 00083 FE7F 48 ASLA 00084 FE80 48 ASLA 00085 FE81 16 TAB 00086 FE82 8D 8E BSR INHEX 00087 FE84 84 0F ANDA #$0F ; MASK TO 4 BITS 00088 FE86 1B ABA 00089 FE87 16 TAB 00090 FE88 FB FF32 ADDB CKSM 00091 FE8B F7 FF32 STAB CKSM 00092 FE8E 39 RTS 00093 ; CHANGE MEMORY (M AAAA DD NN) 00094 FE8F 8D DC CHANGE BSR BADDR ; BUILD ADDRESS 00095 FE91 8D 34 BSR OUTS ; PRINT SPACE 00096 FE93 8D 30 BSR OUT2HS 00097 FE95 8D E4 BSR BYTE 00098 FE97 09 DEX 00099 FE98 A7 00 STAA 0,X 00100 FE9A A1 00 CMPA 0,X 00101 FE9C 26 BF BNE LOAD19 ; MEMORY DID NOT CHANGE 00102 FE9E 20 3B BRA CONTRL 00103 FEA0 44 OUTHL LSRA ; OUT HEX LEFT BCD DIGIT 00104 FEA1 44 LSRA 00105 FEA2 44 LSRA 00106 FEA3 44 LSRA 00107 FEA4 84 0F OUTHR ANDA #$F ; OUT HEX RIGHT BCD DIGIT 00108 FEA6 8B 30 ADDA #$30 00109 FEA8 81 39 CMPA #$39 00110 FEAA 23 02 BLS OUTCH 00111 FEAC 8B 07 ADDA #$7 00112 ; OUTPUT ONE CHAR 00113 FEAE 37 OUTCH PSHB ; SAVE B-REG 00114 FEAF F6 FCF4 OUTC1 LDAB ACIACS 00115 FEB2 57 ASRB 00116 FEB3 57 ASRB 00117 FEB4 24 F9 BCC OUTC1 ; XMIT NOT READY 00118 FEB6 B7 FCF5 STAA ACIADA ; OUTPUT CHARACTER 00119 FEB9 33 PULB ; RESTORE B-REG 00120 FEBA 39 RTS 00121 FEBB A6 00 OUT2H LDAA 0,X ; OUTPUT 2 HEX CHAR 00122 FEBD 8D E1 BSR OUTHL ; OUT LEFT HEX CHAR 00123 FEBF A6 00 LDAA 0,X 00124 FEC1 8D E1 BSR OUTHR ; OUT RIGHT HEX CHAR 00125 FEC3 08 INX 00126 FEC4 39 RTS 00127 FEC5 8D F4 OUT2HS BSR OUT2H ; OUTPUT 2 HEX CHAR + SPACE 00128 FEC7 86 20 OUTS LDAA #$20 ; SPACE 00129 FEC9 20 E3 BRA OUTCH ; (BSR & RTS) 00130 ; PRINT CONTENTS OF STACK 00131 FECB 30 PRINT TSX 00132 FECC FF FF30 STX SP ; SAVE STACK POINTER 00133 FECF C6 09 LDAB #9 00134 FED1 8D F2 PRINT2 BSR OUT2HS ; OUT 2 HEX & SPACE 00135 FED3 5A DECB 00136 FED4 26 FB BNE PRINT2 00137 ; ENTER POWER ON SEQUENCE 00138 FED6 START EQU * 00139 ; INZ ACIA 00140 FED6 86 B1 LDAA #$B1 ; SET SYSTEM PARAMETERS 00141 FED8 B7 FCF4 STAA ACIACS 00142 FEDB 8E FF28 CONTRL LDS #STACK ; SET STACK POINTER 00143 FEDE 86 0D LDAA #$D ; CARRIAGE RETURN 00144 FEE0 8D CC BSR OUTCH 00145 FEE2 86 0A LDAA #$A ; LINE FEED 00146 FEE4 8D C8 BSR OUTCH 00147 FEE6 BD FE00 JSR INCH ; READ CHARACTER 00148 FEE9 16 TAB 00149 FEEA 8D DB BSR OUTS ; PRINT SPACE 00150 FEEC C1 4C CMPB #'L 00151 FEEE 26 03 BNE *+5 00152 FEF0 7E FE27 JMP LOAD 00153 FEF3 C1 4D CMPB #'M 00154 FEF5 27 98 BEQ CHANGE 00155 FEF7 C1 50 CMPB #'P 00156 FEF9 27 D0 BEQ PRINT ; STACK 00157 FEFB C1 47 CMPB #'G 00158 FEFD 26 DC BNE CONTRL 00159 FEFF 3B RTI ; GO 00160 ; 00161 FF00 ORG $FF00 00162 FF00 0028 RMB 40 00163 FF28 0001 STACK RMB 1 ; STACK POINTER 00164 ; REGISTERS FOR GO 00165 FF29 0001 RMB 1 ; CONDITION CODES 00166 FF2A 0001 RMB 1 ; B ACCUMULATOR 00167 FF2B 0001 RMB 1 ; A 00168 FF2C 0001 RMB 1 ; X-HIGH 00169 FF2D 0001 RMB 1 ; X-LOW 00170 FF2E 0001 RMB 1 ; P-HIGH 00171 FF2F 0001 RMB 1 ; P-LOW 00172 FF30 0001 SP RMB 1 ; S-HIGH 00173 FF31 0001 RMB 1 ; S-LOW 00174 ; END REGISTERS FOR GO 00175 FF32 0001 CKSM RMB 1 ; CHECKSUM 00176 FF33 0001 BYTECT RMB 1 ; BYTE COUNT 00177 FF34 0001 XHI RMB 1 ; XREG HIGH 00178 FF35 0001 XLOW RMB 1 ; XREG LOW 00179 FF36 END 00180 Total Errors: 0 --------------------------------------------------------------------------- | Symbol - Value | Symbol - Value | Symbol - Value | |------------------------+-------------------------+------------------------| | ACIACS - $FCF4 | INHEX - $FE12 | OUTHL - $FEA0 | | ACIADA - $FCF5 | LOAD - $FE27 | OUTHR - $FEA4 | | BADDR - $FE6D | LOAD11 - $FE4C | OUTS - $FEC7 | | BYTE - $FE7B | LOAD15 - $FE58 | PRINT - $FECB | | BYTECT - $FF33 | LOAD19 - $FE5D | PRINT2 - $FED1 | | C1 - $FE6A | LOAD21 - $FE61 | SP - $FF30 | | CHANGE - $FE8F | LOAD3 - $FE30 | STACK - $FF28 | | CKSM - $FF32 | OUT2H - $FEBB | START - $FED6 | | CONTRL - $FEDB | OUT2HS - $FEC5 | XHI - $FF34 | | IN1HG - $FE26 | OUTC1 - $FEAF | XLOW - $FF35 | | INCH - $FE00 | OUTCH - $FEAE | - $0000 | ---------------------------------------------------------------------------