Micro-TO Keyer by Chet Opal, K3CUW

This is one of the first keyers to use the early RTµL (Resistor Transistor microLogic) integrated circuits. It was published in the August, 1967 issue of QST and was written by Chet Opal, K3CUW. It was also published in the 1968 ARRL Handbook. Although not shown, the collector of Q4 was connected to an audio oscillator, as a keying monitor.

It's important to note the power connections. The Pulse Generator is run on 3.0 Volts. Whereas, the logic, and relay driver, is run on 3.6 Volts.

There are a few problems that came up, after the publication of the article. It seems that users have experienced a latching condition of the relay, following the completion of a letter. Plus, the keyer had problems making dashes at slow speeds. One suggestion or curing the problem is add a 100KΩ resistor from the base of Q2 to ground. That may fix the issue, but the real cause is the high gain of Q2 (2N3643). Betas of 300 can be measured on some 2N3643's. Replacing Q2 with a different low-gain or medium-gain silicon switching transistor, with a beta greater than 10.

Another suggestion is to bypass, to ground, both sides of the relay coil with 0.01 µF capacitor.

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Chet Opal, K3CUW
Title
Micro-TO Keyer
Size
B
Document Number
QST August, 1967
Rev
None
Date:
3/7/2020
Sheet 1 of 4
R1
100KΩ
+3.0 V
R2
27KΩ
R3
100Ω
+3.0 V
PULSE GENERATOR
R4
47KΩ
R5
100Ω
R6
1KΩ
R7
1KΩ
+3.6 V
CR1
1N64
CR2
1N64
C5
0.001uF
C6
0.001uF
+
C1
1uF
Q1
2N3638
Q2
2N3643
Q3
2N3642
P
T
S
C
Q
Q
1
2
3
6
7
5
µL923
U1
DOT FLIP-FLOP
P
T
S
C
Q
Q
1
2
3
6
7
5
µL923
U2
DASH FLIP-FLOP
3
5
6
µL914
U3-B
OUTPUT GATE
1
2
7
µL914
U3-A
Q4
2N3643
CR3
1N64
K1
12VDC
+3.6 V
RELAY DRIVER
S1
TUNE
R10
220Ω
TO TRANS.
T1
120 VAC : 6.3 VAC
117VAC
117VAC
+
C3
1000uF
CR4
1N4001
CR5
1N4001
+
C3
1000uF
R9
47Ω
+
C4
100uF
+3.6 V
+3.0 V
VCC
GND
8
4
U1 - µL923
+3.6 V
VCC
GND
8
4
U2 - µL923
+3.6 V
VCC
GND
8
4
U3 - µL914
+3.6 V

The image below is from a simulation of the Micro-TO Keyer. In the simulation, the word "PARIS" was sent 20 times which took exactly 1 minute. However, the image below only shows 6 seconds of that simulation, or two complete words. I have overlayed the first complete word with "yellow" characters, so you can visualize it better. This is equivalent to sending Morse Code at 20 WPM.

Micro TO Keyer Sending PARIS PARIS

The clock is keyed by a Dot/Dash keying input. This synchronizes the clock to the user and elimates the need for the user to synchronize to a free running clock. The dots and dashes are self completing, as are the space between dots and dashes. However, there is no control over the space between letters or words. So lots of practice is needed to keep the letters and words from running together.

This keyer does not produce alternate dots and dashes, if both paddles are simultaneously closed. So it is probably best to use a Single-Lever paddle and avoid that situation.

Micro-TO MK II Keyer by Chet Opal, K3CUW

About eight years after the Micro-TO Keyer was published, Chet Opal, K3CUW published the design below in the September 1975 issue of QST Magazine. The big diference is that this design use the popular CMOS series of ICs. I only included the logic portion that is responsible for generating the dots and dashes and the keying interface. This is why U3, the Keying Monitor, is missing. The signal CW Out is active low and goes to the Keying Monitor. Note that the keying interface (R6, Q1, R7, C4, and D1) is intended for Grid-Block keying. The transistor, Q1, must be a high-voltage (-150V) silicon transistor. The keyer was meant to run off of a 9 Volt battery. While it will last a long time on one battery, it should be turned off or the battery removed, when not in use.

The keyer clock is keyed by the action of the dot and dash paddles. This makes it easier for the user. Dots and dashes are self completing, as are the space between dots and dashes. However, there is no control over the space between letters or words. So, again, lots of practice is needed to keep the letters and words from running together.

This keyer does not produce alternate dots and dashes, if both paddles are simultaneously closed. So it is probably best to use a Single-Lever paddle and avoid that situation. I didn't include a simulation output with this keyer, because it basically looks the same as the Micro-TO Keyer.

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Chet Opal, K3CUW
Title
Micro-TO MK II Keyer
Size
B
Document Number
QST September, 1975
Rev
None
Date:
3/7/2020
Sheet 1 of 4
Dot Paddle
R1
1M
+9V
C1
0.001uF
Dash Paddle
R2
1M
+9V
C2
0.001uF
Paddle Com
2
1
8
9
CD4023
U1
A
DOT GATE
6
5
4
CD4001
U2
B
CLOCK ENA
13
12
11
CD4001
U2
D
CLOCK
11
12
13
10
CD4023
U1
B
3
4
5
6
CD4023
U1
C
R3
1M
R4
27K
R5
100K
C3
0.33uF
S
R
D
Q
Q
3
5
6
4
1
2
CD4013
U4
A
DOT FF
1
2
3
CD4001
U2
A
S
R
D
Q
Q
11
9
8
10
13
12
CD4013
U4
B
DASH FF
8
9
10
CD4001
U2
C
OUTPUT GATE
R6
10K
Q1
2N5415
+9V
R7
2,200 Ω
D1
1N4002
C4
0.001uF
To XMTR
Grid-Block Keying
CW_Out
To Keying Mon.
VCC
GND
14
7
U1 - CD4023
+9V
VCC
GND
14
7
U2 - CD4001
+9V
VCC
GND
14
7
U4 - CD4013
+9V

Schematic Correction: The original schematic, in the QST Magazine (September 1975), shows end of left end of R2 (top of R2 in my schematic) grounded. That end of the resistor should be connected to +9V. In the article, it appears that the PC layout is correct and only the schematic was wrong.