Introduction Drawing Definitions Symbol Options Symbol Test Bench Instantiation Code Fixes Additions

CMOS Logic Symbols

The page is is a test bench for the symbols in the CD4xxx, CMOS Logic library. The selectors provide the user with all possible options for each and every symbol. However, not all options apply to all symbols. You will see this when you select a logic device. The options listed below the Device Name will change dynamically, based on the specific device.

This page can also be used when you are drawing a logic schematic that contains CMOS logic. Once you get the symbol you want in the test area, and adjusted with the proper annotation, the complete instance is available below the selection area. This code can then be inserted directly into your drawing script. There will be a few things, like the Drawing Object and Symbol Coordinates, that need changing. But the rest can just be used as is.

This is not a comprehensive library of CMOS logic devices. I started with a basic set of gates and then only add more complex devices as I find the need for them. For information on how to add a symbol to the library, see the section at the botton of this page labeled Adding a Symbol to the Logic Library

Note that, for logic gates, there are no options for rotating a logic symbol, so that it would face up, down, or backwards. I originally had that capability but removed it. I personally never use rotated logic symbols and found that including that capability only serves to over complicate the source code. It just isn't worth the extra code to provide this capability. A good designer can figure a way around rotated logic symbols.

An exception to this are some larger ICs that have only one section. These are higher level functions, like counters or shift registers. These ICs have the ability to be displayed vertically or hrorizontally.

One option that I did retains is the use of DeMorgan equivalents. Since DeMorgan equivalents are really only needed for gated, I thought they should be retained.

Introduction Drawing Definitions Symbol Options Symbol Test Bench Instantiation Code Fixes Additions

Drawing Definition

To draw a symbol, you first need a place to draw the symbol. I use a <div>...<div> structure to contain the drawing. The drawing area can be styled to whatever dimension suites you. I mostly use a style class called "B-Size". This is a drawing area that is 900 pixels wide and 600 pixels high. The upper left corner is considered (0,0). The drawing structure also needs a id. The id makes the drawing structure unique and is used by the draw program to address the correct drawing. Within the drawing, the id is the CMOS_Obj.

An example of the code that you can put into a HTML file, so you can draw a picture, is below. The example definces a space that is "B-Size" (900 x 600 pixels), has a 1 pixel solid green border, and is named "My_Schematic". The definition for the "B-Size" class is in the master CSS file.

<div id="My_Schematic" class="B-Size" style="border: solid 1px green;"><div>

Other definitions that can be added to the "style" are "margin" and "float". You could even included height and width if you want to start with a larger drawing area and then pare down when it's completed. But that brings up another issue on how to group your drawing symbols so that the drawing area can be reduced.

Introduction Drawing Definitions Symbol Options Symbol Test Bench Instantiation Code Fixes Additions

Symbol Options

An example of a call to draw a logic symbol is below.

CMOS_Return[] = CMOS_Logic( CMOS_Obj, CMOS_RefDes, CMOS_Dev, CMOS_Opt, CMOS_Sect/CMOS_MapTo, Center_X, Center_Y );

The Javascript command above, draws a CMOS symbol starting at point Center_X, Center_Y. CMOS_Return[] is an array of coordinates for the input, output, and control signals that a particular device may have. Where:

• CMOS_Obj - Drawing Object or id. This is the id of the <div>...<div> structure that you defined, in the HTML file, to contain the drawing.
• CMOS_RefDes - Reference Designator. Every symbol on a schematic has a unique name, or Reference Designator, that identifies the specific device (e.g. "U1" through "U20)
• CMOS_Dev - This is the name of the logic device that you want to draw. See the CMOS_Dev dropdown for a list of available devices.
Normal/DeMorgan | Reserved | | NoSwap/Swap | | | Technology | | | S LS F H HC HCT C | | | | | | | | | | | | | | | | | | | | Bit 0 1 2 3 4 5 6 7 8 9 VAL 1 2 4 8 16 32 64 128 256 512 Example: Normal | NoSwap = 0 Example: DeMorgan | Swap = 4 | 1 = 5 Example: DeMorgan | NoSwap = 1 Example: Normal | NoSwap | HCT = 256
• CMOS_Opt - This is a number between 0 and 517 that indicates the options that are to be applied to this symbol. The selections listed below are "ORed" together to obtain the CMOS_Opt value.
• CMOS_DeMorgan = 1 - This option displays the DeMorgan Equivalent of the logic symbol defined in CMOS_Dev. Note that only gates have a DeMorgan Equivalent
• CMOS_Swap = 4 - When replicating a drawing it common for the input pin ordering to not match the original. This option allows for the swapping of input pins. For logic gates with only two inputs, this operation is relatively simple. When set Lib_S_Swap will switch the input pin numbers. However, for gates with more than two inputs, this is a fairly complex operation. That's because a SN7410, with 3 inputs, has 6 possibilities and a SN7420, with 4 inputs, has 24 possibilities. But, when you are working with a SN7430, with 8 inputs, the number of possibilities is 40,320. Even further is the SN74133 with 13 inputs. The swap possibilities are over 6 billion. That's a little bit more than I want to deal with.
• CMOS_Technology = S=8 | LS=16 | F=32 | H=64 | HC=128 | HCT=256 | C=512 - To specify a logic device's specific technology, a group of 1 to 3 letters are inserted between the SN74 and the logic device's ID number. So a Standard CMOS logic device might be a SN7400, but a Low Powered Schottky logic device would be specified as SN74LS74.
• CMOS_Sect-CMOS_MapTo -
• Center_X, Center_Y -

Introduction Drawing Definitions Symbol Options Symbol Test Bench Instantiation Code Fixes Additions

Test Bench #1

Parameter	Description		Example
Dwg_Obj	jsGraphics Object that points to the drawing.		0 10 30 50 70 90 110 140 170 320 300 280 260 240 220 200 180 160 140 120 100 80 60 40 20 13 1 2 CD4066 U1-A
CMOS_RefDes	Reference Designator ("U1", "U2", etc.) quoted string. U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 U18 U19 U20 none
CMOS_Dev	Device Name ("4001", "4002", etc.) quoted sting. OC = Open Collector. CD4001 - Quad 2-Input NOR Gate CD4002 - Dual 4-Input NOR Gate CD4011 - Quad 2-Input NAND Gate CD4013 - Dual D-Flop w/RS CD4015B - Dual 4-Stage Shift Reg CD4016 - Analog Switch CD4017 - 5-Stage Johnson Counter W/Decoder CD4018 - Counter/Divider CD4021 - Shift Register, 8-Stage CD4023 - Triple 3-Input NAND Gate CD4024 - 7-Stage Ripple Counter CD4025 - Triple 3-Input NOR Gate CD4026 - Decade Counter/Divider CD4027 - Dual J-K Flip-Flop CD4031 - 64-Stage Static Shift Reg CD4040 - 12-Stage Ripple Counter CD4046 - Micropower Phase-Locked Loop CD4049 - Hex Inverter CD4051B - Single 8-Ch Analog Mux/Demux CD4052B - Dual 4-Ch Analog Mux/Demux CD4053B - Triple 2-Ch Analog Mux/Demux CD4060 - Counter/Osc, 14 Stage CD4066 - Analog Switch CD4068 - 8-Input NAND/AND CD4069 - Hex Inverter (1/2 UL) CD4071 - Quad 2-Input OR Gate CD4075 - Triple 3-Input OR Gate CD4081 - Quad 2-Input AND Gate CD4093 - Quad 2-Input NAND Gate, Schmidt CD40105 - FIFI Register CD40106 - Hex Inverter Schmidt CD4555B - Dual 1 of 4 Mux, Output Active High CD4556B - Dual 1 of 4 Mux, Output Active Low
CMOS_Option	Normal DeMorgan Right Left No Swap Swap Pin Order
CMOS_Sect	This is used to select the pins from one section but label the gate as different section.	Pin Section A  B  C  D  PWR
CMOS_MapTo		Label Section A  B  C  D
Center_X	Symbol Center X Position	Show/Hide Grid (10x10), Center Mark (Orange), Pins (purple dot). Grid On Off Center On Off Pins On Off
Center_Y	Symbol Center Y Position

Introduction Drawing Definitions Symbol Options Symbol Test Bench Instantiation Code Fixes Additions

The selections from the Test Bench above, are used to create the example code below. After selecting and entering your specific information in the Test Bench, the code below can be used directly, with a copy/paste. The items in Red are the only ones that need to be adjusted to your specific needs. The lines in Green are just comments and can be deleted. Due to space limitations, some of the lines below may be split onto more than one line.

Note: In the instantiation code above, the return value from the call to CMOS_Logic(); is an array of X-Y coordinates that match the signal pins shown in the Test Bench above.

CD4046 Test Bench

Parameter	Description		Example
Dwg_Obj	jsGraphics Object that points to the drawing.
CMOS_RefDes	Reference Designator ("U1", "U2", etc.) quoted string. U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 none
CMOS_Dev	CD4046 - Micropower Phase-Locked Loop
CMOS_Sect	Phase Det VCO
Center_X	Symbol Center X Position	Show/Hide Grid (10x10), Center Mark (Orange), Pins (purple dot). Grid On Off Center On Off Pins On Off
Center_Y	Symbol Center Y Position

The selections from the Test Bench above, are used to create the example code below. After selecting and entering your specific information in the Test Bench, the code below can be used directly, with a copy/paste. The items in Red are the only ones that need to be adjusted to your specific needs. The lines in Green are just comments and can be deleted. Due to space limitations, some of the lines below may be split onto more than one line.

Note: In the instantiation code above, the return value from the call to CMOS_Logic(); is an array of X-Y coordinates that match the signal pins shown in the Test Bench above.

Introduction Drawing Definitions Symbol Options Symbol Test Bench Instantiation Code Fixes Additions

Fixes Required for the CMOS Library

These are items that are still outstanding in the CMOS Library. When they are fixed, they will be removed.

• The DeMorgan Equivalent doesn't work right for the CD4002 Dual 4-Input NOR Gate. The gate changes to a NAND gate but the bubbles do not move.
• The CD4071 Quad 2-Input OR Gate has no output wire on LEFT view. DeMorgan Equivalent is also incorrect.
• Implement the changing of Left/Right to Horiz/Vert in Test Bench. This should only be for functions that have a single body, like the CD4026 Decade Counter/Divider. Use the same codes for both.
• The CD40106 Hex Inverter, Schmidt does not show the schmidt symbol correctly. It is too big to fit in the inverter symbol.
• The CD4066 Analog Switch right facing switch gate has the pin placement on the wrong side.

Introduction Drawing Definitions Symbol Options Symbol Test Bench Instantiation Code Fixes Additions

Adding a Symbol to the Logic Library